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2)Operands
Specify the data or register address
Specify the data or register address
Specify the register to store the sum result
3)Suitable Soft Components
*Note: D includes D, HD. TD includes TD, HTD. CD includes CD, HCD, HSCD, HSD. DM
includes DM, DHM. DS includes DS, DHS. M includes M, HM, SM. S includes S and HS. T
includes T and HT. C includes C and HC.
<16 bits instruction>
ADD D10 D12 D14
X0
S1· S2· D·
<32 bits instruction>
DADD D10 D12 D14
X0
S1· S2· D·
Two source data make binary addition and the result data store in object address.
The highest bit of each data is positive (0) and negative (1) sign bit. These data will make
addition operation through algebra. Such as 5 + (-8) = -3.
If the result of a calculations is “0”, the “0’ flag acts. If the result exceeds 323,767(16 bits
operation) or 2,147,483,648 (32 bits operation), the carry flag acts. (refer to the next page). If
the result exceeds -323,768 (16 bits operation) or -2,147,483,648 (32 bits operation), the
borrow flag acts (Refer to the next page).
When carry on32 bits operation, low16 bits of 32-bit register are assigned, the register
address close to the low16 bits register will be assigned to high16 bits of 32-bit register. Even
number is recommended for the low16 bits register address.
The source and object can be same register address.
In the above example, when X0 is ON, the addition operation will be excuted in each
scanning period.
(D11D10) + (D13D12) → (D15D14)
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