Zenith H-100 - Circuit Description

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CIRCUIT DESCRIPTION
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BLOCK DIAGRAM DESCRIPTION
5-127
DETAILED CIRCUIT DESCRIPTION
5-128
S-100
Bus Interface
5-128
Data In
5-128
Data Out
5-128
Address Lines
5-128
Control Lines
5-128
Vector
Interrupt Lines
5-129
Ready Line
5-129
RESET CI RCUITS
5-129
Power-Up/Reset
5-129
Power-Up Write Protection
5-130
CPU/Controller Logic
5-130
Read Status Latch (U31)
5-130
Read Status Register of 1797
(U22)
5-131
Write Control Latch
(U30)
5-132
Write Control Register in the
1797
(U22)
5-133
Data Read/Write Operations 5-134
ROY Delay 5-135
Interrupts 5-135
CONTROLLER/DISK-DRIVE LOGIC
5-136
Data Shaping 5-136
Data Separation and
Precompensation
5-136
Head Load Timi ng 5-138
1797 Timing 5-139
8" Drive Interface 5-139
5" Drive Interface 5-139
CALIBRATION CIRCUIT BOARD 5-140
H-207 FLOPPY DISK CONTROLLER BOARD DEFINITIONS 5-141
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