eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
108
Bit b, (IX/Y+d)
Bit Test
Operation
Z ← ~(IX/Y+d)[b]
Description
The (
IX/Y
+
d
) operand is an 8-bit value stored at the memory location specified by the
contents of the Index Register, IX or IY, added to the two’s-complement displacement
d
.
This instruction tests bit
b
of this 8-bit value and sets the 0 Flag (Z) if the bit is 0. The Z
Flag is reset if bit
b
of operand (HL) is a one.
Condition Bits Affected
Attributes
kk = binary code 01 bbb 110, where bbb identifies the bit tested and assembled into the
object code, as indicated in Table 45.
S Undefined.
Z Set if bit b is 0; reset otherwise.
H Set.
P/V Undefined.
N Reset.
C Not affected.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
BIT b,(IX+d)X 5 DD, CB, dd, kk
BIT.S b,(IX+d)1 6 52, DD, CB, dd, kk
BIT.L b,(IX+d)0 6 49, DD, CB, dd, kk
BIT b,(IY+d)X 5 FD, CB, dd, kk
BIT.S b,(IY+d)1 6 52, FD, CB, dd, kk
BIT.L b,(IY+d)0 6 49, FD, CB, dd, kk
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