ZiLOG eZ80 User Manual

eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
130
Attributes
Example
If an addition operation is performed between 15 (BCD) and 27 (BCD), simple decimal
arithmetic yields the following result:
However, when the binary representations are added in the accumulator according to stan-
dard binary arithmetic, the resulting sum is an invalid BCD value:
The
DAA instruction adjusts the result so that the correct BCD representation is obtained:
P/V Set if the result is even parity after the operation; reset
otherwise.
N Not affected.
C See
Table 51 on page 129.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
DAA —X 127
15
+27
42
0001 0101 = 15 (BCD)
+0010 0111
= 27 (BCD)
0011 1100 = 3C (invalid BCD
value)
0011 1100 = 3C(invalid BCD
value)
+0000 0110
= 06 (BCD)
0100 0010 = 42 (BCD result)
S Set if the msb of the result is 1 after the operation; reset
otherwise.

ZiLOG eZ80 Specifications

General

Brand	ZiLOG
Model	eZ80
Category	Computer Hardware
Language	English