eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
193
LD A, R
Load Accumulator
Operation
A ← R
Description
The CPU writes the contents of the Refresh Counter register, R, to the accumulator, A.
Condition Bits Affected
Attributes
S Set if the R register is negative; reset otherwise.
Z Set if the R register is 0; reset otherwise.
H Reset.
P/V Contains contents of IEF2.
N Reset.
C Not affected.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
LD A,I X 2 ED, 5F