eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
233
LD (rr), A
Load Indirect
Operation
(rr) ← A
Description
The
rr
operand is any of the multibyte registers BC, DE, or HL. The CPU stores the con-
tents of the accumulator, A, in the memory location specified by the contents of the multi-
byte register
rr.
Condition Bits Affected
None.
Attributes
Mnemonic Operand ADL Mode Cycle Opcode (hex)
LD (BC),A X 2 02
LD.S (BC),A 1 3 52, 02
LD.L (BC),A 0 3 49, 02
LD (DE),A X 2 12
LD.S (DE),A 1 3 52, 12
LD.L (DE),A 0 3 49, 12
LD (HL),A X 2 77
LD.S (HL),A 1 3 52, 77
LD.L (HL),A 0 3 49, 77