eZ80
®
CPU
User Manual
UM007714-0908 Glossary
392
SLP. Sleep; a processor control instruction.
SMR. Stop-Mode Recovery.
SP. Stack Pointer.
SPH. Stack Pointer High.
SPL. Stack Pointer Low. The 24-bit Stack Pointer Long register.
SPS. The 16-bit Stack Pointer Short register.
SR. Shift Right.
SRA. Shift Right Arithmetic; a shift instruction.
SRL. Shift Right Logical; a shift instruction.
STMIX. Set Mixed-ADL mode flag; a processor control instruction.
SUB. Subtract without Carry; an arithmetic instruction.
T
A
. Ambient Temperature.
TpC. External Clock Cycle.
tristate. A form of transistor-to-transistor logic in which output stages, or input and output stages, can
assume three states. Two are normal low-impedance 1 and 0 states; the third is a high-impedance state that
allows many tristate devices to time-share bus lines. This industry term is not trademarked, and is available
for Zilog use. Do not use 3-state or three-state.
TST. Test Accumulator; a logical instruction.
TSTIO. Test I/O; an input/output instruction.
TX. Abbreviation for transmitter, transmit.
UART. Universal Asynchronous Receiver/Transmitter—a component or functional block that manages
asynchronous communications. A UART converts data from the parallel format in which it is stored to a
serial format for transmission.
upconverter. A device that translates frequencies from lower to higher frequencies.
USART. Universal Synchronous/Asynchronous Receiver/Transmitter. Can manage synchronous and
asynchronous transmissions.
VBO. Voltage Brown-Out.
V
CC
. Supply voltage.
V
PP
. Programmed Voltage.
V
REF
. Analog reference voltage.
WAIT state. A clock cycle during which no instructions are executed because the processor is waiting for
data from memory.
WDT. Watch-Dog Timer. A timer that, when enabled under normal operating conditions, must be reset
within the time period set within the application (WDTMR (1,0)). If the timer is not reset, a Power-on
Reset occurs. Some older manuals refer to this timer as the WDTMR.
WDTOUT. Watch-Dog Timer output.
X
IN
. Crystal Input.
XOR. Logical Exclusive OR; a logical instruction.
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