ZiLOG eZ80 User Manual

eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
76
SBC HL, ss
HL ←
HL – ss – C
rr ED 42-62 *** V 1*
SP ED 72
SCF
C ←
1
37 —— 0 — 0 1
SET b, s
s[b] ←
1
(HL) CB C6-FE ——————
(IX/Y+d) DD/FD CB dd
C6-FE
r CB C0-FF
SLA s (HL) CB 26 **0 P 0*
(IX/Y+d) DD/FD CB dd
26
r CB 20-27
SLP ED 76 ——————
SRA s (HL) CB 2E **0 P 0*
(IX/Y+d) DD/FD CB dd
2E
r CB 28-2F
SRL s (HL) CB 3E **0 P 0*
(IX/Y+d) DD/FD CB dd
3E
r CB 38-3F
STMIX
MADL ←
1
ED 7D ——————
Table 37. Instruction Summary (Continued)
Instruction and Operation
Address Mode
Opcode(s)
(Hex)
Flags Affected
Dest Source S Z H P/V N C
Note: *This flag value is a function of the result of the affected operation.
— = No Change.
0 = Set to 0.
1 = Set to 1.
V = Set to 1 if overflow occurs.
X = Undetermined.
P = Set to the parity of the result (0 if odd parity, 1 if even parity).
IEF2 = The value of Interrupt Enable Flag 2.
C
7
0
s
0
C
7
0
s
0
C
7
0
s

ZiLOG eZ80 Specifications

General

Brand	ZiLOG
Model	eZ80
Category	Computer Hardware
Language	English