Section 3 1MRS240173-IB B
0x registers
14 REF615R
DPU2000R Modbus Point List Mitigation Manual
57 Neutral Instantaneous Over-current Trip
(50N3 latch)
See Section 7.1.6 for
example or explanation
58 Phase Time Over-current Enabled
(51P latch)
See Section 7.1.6 for
example or explanation
59 Neutral Time Over-current Enabled
(51N latch)
See Section 7.1.6 for
example or explanation
60 Overvoltage Trip
(59 latch)
See Section 7.1.6 for
example or explanation
61 Direct Over-current Trip Positive Sequence
(67P-1 latch)
See Section 7.1.6 for
example or explanation
62 Direct Over-current Trip Negative Sequence
(67N latch)
See Section 7.1.6 for
example or explanation
63 Frequency Shed (1st Stage) (81S-1 latch) See Section 7.1.6 for
example or explanation
64 Frequency Restore (1st Stage) (81R-1 latch) See Section 7.1.6 for
example or explanation
65 Over frequency (1st Stage) (81O-1 latch) See Section 7.1.6 for
example or explanation
66 Three Phase Under voltage Trip
(27-3P latch)
See Section 7.1.6 for
example or explanation
67 TRIP A Single Phase Trip (Phase A) (TRIP A
latch)
See Section 7.1.6 for
example or explanation
68 TRIP B Single Phase Trip (Phase B) (TRIP B
latch)
See Section 7.1.6 for
example or explanation
69 TRIP C Single Phase Trip (Phase C) (TRIP C
latch)
See Section 7.1.6 for
example or explanation
70 User Logical Output 1 (ULO1) N/A in REF615R
71 User Logical Output 2 (ULO2) N/A in REF615R
72 User Logical Output 3 (ULO3) N/A in REF615R
73 User Logical Output 4 (ULO4) N/A in REF615R
74 User Logical Output 5 (ULO5) N/A in REF615R
75 User Logical Output 6 (ULO6) N/A in REF615R
76 User Logical Output 7 (ULO7) N/A in REF615R
77 User Logical Output 8 (ULO8) N/A in REF615R
78 User Logical Output 9 (ULO9) N/A in REF615R
79 Positive 3 Phase KVAR Alarm (PVARA) N/A in REF615R
80 Negative 3 Phase KVAR Alarm (NVARA) N/A in REF615R
81 Load Current Alarm (LOADA) 81 LD0.CMMXU1.HiAlm.stVal
82 Over frequency (1st Stage) (81O-1) 82 LD0.FRPTOF1.Op.general
83 Over frequency (2nd Stage) (81O-2) 83 LD0.FRPTOF2.Op.general
84 Frequency Shed (2nd Stage) (81S-2) 84 LD0.LSHDPTRC2.Op.general
85 Frequency Restore (2nd Stage) (81R-2) 85 LD0.LSHDPTRC2.RestLodOp.general
86 Over frequency (2nd Stage) (81O-2 latch) See Section 7.1.6 for
example or explanation
87 Frequency Shed (2nd Stage) (81S-2 latch) See Section 7.1.6 for
example or explanation
DPU2000R
register
addr.
DPU 2000R description
REF615R
register
addr.
IEC 61850 path
Comments on REF615R
Modbus points mapping
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