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Computer command message AC drive response message
D7 LRC HI LRC HI D7 LRC HI LRC HI
D8 LRC LO LRC LO D8 LRC LO LRC LO
END HI 0D END HI 0D
END LO 0A END LO 0A
CRC(Cyclical Redundancy Check) is calculated by the following steps:
Step 1. Load a 16-bit register (called CRC register) with FFFFH.
Step 2. Exclusive OR the first 8-bit byte of the command message with
the low order byte of the 16-bit CRC register, putting the result
in the CRC register.
Step 3. Shift the CRC registers one bit to the right with MSB zero filling.
Extract and examine the LSB.
Step 4. If the LSB of CRC register is 0, repeat step 3, else Exclusive OR
the CRC register with the polynomial value A001H.
Step 5. Repeat step 3 and 4 until eight shifts have been performed. When
this is done, a complete 8-bit byte will have been processed.
Step 6. Repeat steps 2 to 5 for the next 8-bit byte of the command mes-
sage. Continue doing this until all bytes have been processed.
The final contents of the CRC register are the CRC value.
LRC (Longitudinal Redundancy Check) is calculated by summing up,
module 256, the values of the bytes from Address to last data character
then calculating the hexadecimal representation of the 2’s-complement
negation of the sum.
For example, refer to 06H at CD00=60.00HZ
34+06+00+00+17+70=C1H
the 2’s-complement negation of C1H is 3FH
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