Akai AP-207

VI. CIRCUIT OPERATION
1.
NAND
EXCLUSIVE OR GATE
(=ANTI~COINCIDENCE)
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GENERAL
The AP-207 has a D.D (Direct Drive) P.C Board
(AP-2642) that contains a FG (Frequency Generator)
the signal output of which controls the motor.
The AP-307 has a PLL (Phase-Locked Loop) P.C
Board (AP-3601) in addition to the electrical circuit
in the AP-207.
The PLL Circuit in the AP-307 consists of a Quartz
Lock Circuit and a Stroboscope Circuit. The strobe-
scope circuit flashes the neon tube NE901 in
synchronism with the frequency to which the crystal
oscillator frequency is accurately counted down,
while the neon tube NE901 in the AP-207 is activated
by the line power to flash the stroboscope patterns
on the turntable.
. SERVO CIRCUIT
1) Operation when the Quartz Lock Switch SW903 is
OFF
(Refer to the D.D. Circuit schematic diagram of
the AP-307.)
The motor incorporates a FG coil that produces
FG signal as the motor rotates. The FG signal
frequency is 20 Hz for 33-1/3 rpm and 27 Hz for
45 rpm. The FG signal is magnified through IC1
(4 to 8). The magnified FG signal is clamped to
positive side by R40 and VR1, and enters IC2 @.
In IC2, the signal is waveform-shaped and fre-
quency-doubled. The doubled signal is fed to IC3
@), as an input to Mono Multi.
The Mono Multi provides a characteristic that its
stable state is inverted by an external trigger into
the unstable state, where it remains for a predeter-
mined time before returning to the original stable
state. The pulse output of Mono Multi IC3 @ is
smoothed by C7 to DC which is led to IC1 @ as
the voltage to be compared. When the Quartz
Lock Switch SW903 is off, a reference voltage is
applied to IC1 @.
The voltage at IC1 @ is compared with the
reference voltage at IC1 @), and the output
appears at. IC1 @. The output at IC1 @ is passed
through the phase correction circuit, consisting of
Fig. 7
C9 thrrough C11 and R18 through R20, to TRI.
TRI. TR1 makes current flow through the Hall
Elements H1 and H2, which are installed in posi-
tion under the rotor magnet of the motor. The
voltage developed across each Hall element is in
proportion to the current flowing through the Hall
Elements and the strength of the magnetic field of
the rotor magnet.
The voltages output of the two Hall elements are
supplied to the motor drive amplifier, consisting of
IC4 (4 to 8), TR2 and TR3 and IC4 (1 to 3), TR4,
and TRS, to control motor speed.
If the motor speed is made late by some cause, the
FG signal frequency becomes lower. The width of
the pulse output of the IC3 Mono Multi becomes
wider. This increases the comparison voltage at
IC1 @, which in turn raises the voltage output of
IC1 @. The result is an increase of the current
flowing through TRI and the Hall elements Hi
and H2. The current increase the motor drive
amplifier so as to make the motor speed fast.
2) Operation when the Quartz Lock Switch SW903 is
ON
(Refer to the PLL Circuit schematic diagram of
the AP-307)
The 4.42368 MHz signal generated by the crystal
oscillator is delivered through TP-1 to IC2 @). The
Flip-Flop in IC2 halves the oscillation frequency
of 4.42368 MHz. The frequency-halved signal is
delivered as a clock pulse to IC3 @, which counts
it down to 1/27 (81.920 Hz) for 33-1/3 rpm or
1/20 (110.592 Hz) for 45 rpm according as set by
the Speed Selector Switch SW902. The count-
down signal, which appears at IC3 QQ, is further
counted down to 20 Hz for 33-1/3 rpm or 27 Hz
for 45 rpm at IC4 @. This output signal of IC4
@® enters the comparison circuit in ICS @, asa
set pulse.
On the other hand, the FG signal fed through the
D.D circuit to the PLL circuit is waveform-shaped
by the Schmitt trigger in IC1 (10 to 13), and is fed
through IC1 @, and R3 to ICS as the reset