Akai VS-2EGN

4-1-1 GENERAL
Fig. 7-68 is a block diagram of the mechanism drive
circuit
1) Reel pulse is generated at PH-1 (GP411), and sent
to the SYS CON (System control PCB).
2) TR-1 (PN2025) is a start sensor, the output of which
is sent to SYS CON.
3) The plunger drive circuit consists of IC-1 (M54532P),
D1, D2, and D3, and the plunger is driven by PL ON
which is an input to IC-1.
4) TR2 and TR3 are transistors for determining the
direction of motor rotation. These transistors determine
the direction of rotation (normal or reverse) of the reel
4-1-2 REEL PULSE GENERATOR CIRCUIT
As shown in Fig. 7-69, vanes in the center are driven
by the take-up reel base. When light passes through the
vane, the impedance of the photo transistor falls, When
the light is cut off by through the vane, the impedance
of the photo transistor rises. When the take-up reel
base is turning, the output waveform as shown in the
figure is detected at the OUT1 terminal, and is fed to the
system control PCB.
4-1-4 PLUNGER DRIVE CIRCUIT
motor, loading motor, and capstan motor.
5) The reel motor drive circuit consists of IC3 (BA6109)
and TR4. IC2 receives RM POWER and MRVS inputs
and drives the reel motor.
6) The loading motor drive circuit consists of IC3 (BA
6109) and TRS. IC3 drives the loading motor under
the control of LM STP, MRVS, and AL-15V inputs.
7) CM (+) and CM(—) from the servo circuit pass
through the relay contacts of RL1, and to the noise
filters (FL1, FL2) on the MECHA Drive P.C Board
and drive the capstan motor. In the REVIEW mode,
RL is switched ON, and the capstan motor runs in the
reverse direction.
5V
OUT 2 ot
‘0.8V
a
LAM TRI
START SENSOR
TAPE
Reel Pulse Generator and Start Sensor
4-1-3 START SENSOR
As shown in Fig. 7-69, the tape stops the lamp light,
and the impedance of the start sensor becomes high. As
the tape reaches the leader section, the lamplight is
transmitted through the tape, the start sensor imped-
ance becomes low, and a low voltage is detected at OUT
2 (Fig. 7-69), and this signal is fed to the system control
PCB.
AL ISV
SYSCON
PL ON
6-—
xe
Fig. 7-70 shows the plunger drive circuit.
When the level on the PL ON terminal is made LOW,
IC1 pin @} becomes HIGH, and IC1 pin stays
LOW during the time determined by the time con-
stant of R4 and C1. This causes a current (approx.
500 mA) to flow between H and-M, and the plung-
er is pulled in. When C1 is fully charged, IC1 pin (})
becomes LOW, and IC1 pin (O) becomes HIGH. As the
PL ON terminal becomes LOW, IC1 pin (2) also be-
comes HIGH, making IC1 pin (6) HIGH and G terminal
LOW. Accordingly, when PLON becomes LOW, a current
58
y
-O-=-&
sy
Fig. 7-70 Plunger Drive Circuit
flows between H and M until Cl is charged, and
the plunger is pulled in. When Cl is charged, a cur-
rent (approx.72 mA) keeps flowing, to hold the plung-
er.
As PL ON becomes HIGH, ICI pins (5) and (2) be-
come LOW. C1 is rapidly discharged through D2, and
pin ©. Both M and G terminals become HIGH, and
the plunger is released. The counter electromotive
force from the relay is absorbed by the diode incorpora-
ted in IC] (M54532P).
Service Manual VS-2EGN