Publication 1762-RM001C-EN-P
System Status File C-11
Minor Error Bits
Overflow Trap Bit
If this bit is ever set (1) upon execution of the END or TND instruction, a
major error (0020H) is generated. To avoid this type of major error from
occurring, examine the state of this bit following a math instruction (ADD,
SUB, MUL, DIV, NEG, SCL, TOD, or FRD), take appropriate action, and
then clear bit S:5/0 using an OTU instruction with S:5/0.
Control Register Error
The LFU, LFL, FFU, FFL, BSL, BSR, SQO, SQC, and SQL instructions are
capable of generating this error. When bit S:5/2 is set (1), it indicates that
the error bit of a control word used by the instruction has been set.
If this bit is ever set upon execution of the END or TND instruction, major
error (0020H) is generated. To avoid this type of major error from
occurring, examine the state of this bit following a control register
instruction, take appropriate action, and then clear bit S:5/2 using an OTU
instruction with S:5/2.
Major Error Detected in User Fault Routine
When set (1), the major error code (S:6) represents the major error that
occurred while processing the User Fault Routine due to another major
error.
Address Data Format Range Type User Program Access
S:5/0 binary 0 or 1 status read/write
Address Data Format Range Type User Program Access
S:5/2 binary 0 or 1 status read/write
Address Data Format Range Type User Program Access
S:5/3 binary 0 or 1 status read/write
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