Operation P54x/EN OP/La4
MiCOM P543, P544, P545 & P546
(OP) 5-9
OP
Figure 35
Aided tripping logic 61
Figure 36
Permissive underreach transfer trip scheme (PUR) (Distance option only) 62
Figure 37
PUR (Distance option only) 62
Figure 38
Permissive overreach transfer trip scheme (POR) (Distance option only) 64
Figure 39
POR 65
Figure 40
Distance blocking scheme (BOP) (Distance option only) 68
Figure 41
Example of fault current reverse of direction 69
Figure 42
Blocking 1 (Distance option only) 69
Figure 43
Blocking 2 (Distance option only) 70
Figure 44
The DEF permissive scheme (Distance option only) 70
Figure 45
Aided DEF (ground) permissive scheme logic (Distance option only) 71
Figure 46
The DEF blocking scheme (Distance option only) 71
Figure 47
Aided DEF (ground) blocking scheme logic (Distance option only) 72
Figure 48
Delta directional comparison POR scheme (Distance option only) 73
Figure 49
delta directional comparison BLOCKING scheme 74
Figure 50
Zone 1 extension scheme 75
Figure 51
Zone 1 extension 76
Figure 52
Loss of load accelerated trip scheme (Distance option only) 77
Figure 53
Loss of load (Distance option only) 78
Figure 54
Directional overcurrent logic 81
Figure 55
Thermal overload protection logic diagram 83
Figure 56
IDG characteristic 85
Figure 57
Directional EF with neutral voltage polarization (single stage) 86
Figure 58
Directional EF with negative sequence polarization (single stage) 87
Figure 59
Negative sequence overcurrent non-directional operation 88
Figure 60
Directionalizing the negative phase sequence overcurrent element 88
Figure 61
Directionalizing the negative phase sequence overcurrent element 89
Figure 62
Undervoltage - single and three phase tripping mode (single stage) 90
Figure 63
Overvoltage - single and three phase tripping mode (single stage) 91
Figure 64
Residual overvoltage logic (single stage) 93
Figure 65
CB failure for P543 and P545 models 95
Figure 66
CB1 failure logic for P544 and P546 models 96
Figure 67
CB2 failure logic for P544 and P546 models 97
Figure 68
Broken conductor logic 97
Figure 69
Underfrequency logic (single stage) 98
Figure 70
Overfrequency logic (single stage) 98
Figure 71
Rate of change of frequency protection 100
Figure 72
Weak infeed configuration on stub-fed radial circuit (parallel line is out of service) 101
Figure 73
Switched communication network 106
Figure 74
Transient bias characteristic 107
Figure 75
3-terminal system connection 115
Figure 76
Pictorial comparison of operating modes 118
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