Altera Cyclone V GX Starter Kit - Chapter 3 Using the Starter Kit; Configuration, Status and Setup

Cyclone V GX Starter Kit
User Manual
24
www.terasic.com
June 5, 2014
Chapter 3
Using the Starter Kit
In this chapter we introduce the important components on the Cyclone V GX Starter Kit.
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The Cyclone V GX Starter board contains a serial configuration device that stores configuration
data for the Cyclone V GX FPGA. This configuration data is automatically loaded from the
configuration device into the FPGA when powered on. Using the Quartus II software, it is possible
to reconfigure the FPGA at any time, and it is also possible to change the non-volatile data that is
stored in the serial configuration device. Both types of programming methods are described below.
1. JTAG programming: In this method of programming, named after the IEEE standards Joint Test
Action Group, the configuration bit stream is downloaded directly into the Cyclone GX FPGA. The
FPGA will retain this configuration as long as power is applied to the board; the configuration
information will be lost when the power is turned off.
2. AS programming: In this method, called Active Serial programming, the configuration bit
stream is downloaded into the Altera EPCQ256 serial configuration device. It provides non-volatile
storage of the bit stream, so that the information is retained even when the power supply to the
Cyclone V GX Starter board is turned off. When the board’s power is turned on, the configuration
data in the EPCQ256 device is automatically loaded into the Cyclone V GX FPGA.
 JTAG Chain on Cyclone V GX Starter board
To use JTAG interface for configuring FPGA device, the JTAG chain on Cyclone V GX Starter Kit
must form a closed loop that allows Quartus II programmer to detect FPGA device. Figure 3-1
illustrates the JTAG chain on Cyclone V GX Starter board. Shorting pin1 and pin2 on JP2 can
disable the JTAG signals on HSMC connector that will form a closed JTAG loop chain on Cyclone
V GX Starter board (See Figure 3-2). Thus, only the on-board FPGA device (Cyclone V GX) will
be detected by the Quartus II programmer. If users want to include another FPGA device or
interface containing FPGA device in the chain via HSMC connector, remove JP2 Jumper (open pin1
and pin2 on JP2) to enable the JTAG signal ports on the HSMC connector.