AMD Xilinx ZCU670 - Page 36

The SDIO signals are connected to ZU67DR RFSoC PS bank 501 which has its VCCMIO set to
1.8V. The SD interface nets MIO[46:49]_SDIO_DAT[0:3], MIO50_SDIO_CMD, and
MIO51_SDIO_CLK each have a series 30Ω resistor at the Bank 501 source. An NXP
NVT4857UK SD 3.0-compliant voltage level-translator U23 is present between the ZU67DR
RFSoC and the SD card connector (J23). The NXP NVT4857UK U23 device provides SD3.0
capability with SDR104 performance.
The following gure shows the connecons of the SD card interface on the ZCU670 board.
Figure 11: SD Card Interface
X25730-091021
The NXP SD3.0 level
shier is mounted on an X-SDM-01 interposer board that has the pin
mapping shown in the following table.
Table 15: NVT4857UK U23 Adapter Pinout
Adapter Pin Number NVT4857UKAZ Pin Number NVT4857UKAZ Pin Name
1 D2 CLKA
2 C3, C2 GND
3 B2 CD
4 C1 CMDA
5 E2 CLK_FB
6 Unused Unused
Chapter 3: Board Component Descriptions
UG1532 (v1.0) March 30, 2022 www.xilinx.com
ZCU670 Board User Guide 36
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