VIPER Detailed hardware description
PXA255 GPIO pin assignments
The following table summarizes the use of the 85 PXA255 GPIO pins, their direction,
alternate function and active level.
For embedded Linux the GPIO pins are setup by Redboot. Under VxWorks and
Windows CE .NET, they are setup by themselves and not by the bootloader.
Key:
AF Alternate function.
Dir Pin direction.
Active Function active level or edge.
Sleep Pin state during sleep mode (all Hi-Z states are to ‘1’ during sleep).
GPIO
No
AF Signal Name Dir Active Sleep Function See section…
0 0 ETHER_INT Input Input Ethernet Interrupt
1 0 PC/104_IRQ Input See
page 26
Input CPLD Interrupt
2 0 USB_IRQ Input Input USB Interrupt
3 0 UART_INT1 Input Input COM 5 Interrupt
4 0 UART_INT2 Input Input COM 4 Interrupt
Interrupt assignments
(page 25
) and Wake up
events
(page 58)
5 0
USER_CONFIG1
Input NA Input User Config 1, Jumper
LK2
User configurable jumper 1
– LK2 (page 70)
6 0 PSU_DATA Output NA 0 Microprocessor Core
Voltage DAC Data
Processor power
management
(page 55)
7 0
Reserved
Input NA Input
Reserved
Reserved – LK3 (page 70
)
8 0 CF_RDY Input NA Input CompactFLASH
Ready/nBusy
Interrupt assignments,
(page 25
and
CompactFLASH
page 24
)
9 0 BLKEN Output High 0 LCD Backlight Enable LCD backlight enable
(page 31
)
10 0 LCDEN Output High 0 LCD Logic Supply
Enable
LCD logic supply enable
(page 32)
11 0 PSU_CLK Output 0 Microprocessor Core
Voltage DAC Clock
Processor power
management
(page 55)
12 0 SHDN Output High 1 COM 1, 2, 3 & 4 UART
Shutdown
13 0 EN1# Output Low 0 COM 1, 2, 3 & 4 UART
Enable
UART power management
(page 57)
© 2004 Arcom Issue H 17
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