Atari 400

the
PACTL
~Port A Control) ~D302):
This address
writes or reads data from
Port
A
Control Register.
Port A Control
D7
D6 DS D4 D3
D2
Dl
DO Register
X
0
1 1
X
X
0
X
Set up register as shown
(X = described below)
D7 - (Read only) Peripheral A Interrupt Status Bit. Serial
bus Proceed line. (Reset by reading Port A Register.
Set by Peripheral A Interrupt.)
D3- Peripheral Motor Control line on serial bus (write).
(0 = On 1 = Off)
D2 -Controls Port A addressing described above (write).
(1 =Port A Register 0 =Direction Control Register).
DO - Peripheral A Interrupt Enable Bit. (Write) 1 = Enable.
Reset by power turn-on or processor. Set by Processor.
PORTB (Port B)(D301): This address reads or writes data from Player 2
and
Player 3 controller jacks if bit 2 of PBCTL is true. This address
writes to the direction control register if bit 2 of PBCTL is zero. I/O for
both ports (A and B) goes through a 6520/6820.
Data Register-Addressed if bit 2 of PBCTL is 1
Joystick Operation
I I I I
D7 D6 DS I D4 I D3 I D2 I Dl
DO
Back Right Back
Right
Left Fwd • ./, Left Fwd.,
~'-------~~------J, ' ~~------J~
Stick3
(Jack 4)
Stick2
(Jack 3)
Paddle 0 eration
I I I I
"---PTRIG7
b
Kevl oar
d c ontro 11 0
er 1p_erat1on
I I I I I I I
D7 I D6 I DS I D4 I D3 1 D2 I
Dl I DO I
l
L_
'--Top
Row}
2nd Row Jack
3rd Row
4th Row
4
III. 20
Top
2nd
3rd
4rd
O=Switch pressed
!=Switch not pressed
O=Switch pressed
!=Switch not pressed
Row}
Row
Row
Row
Jack 3