Basler racer - Page 23

AW00118702000 Camera Link Implementation
Basler racer Camera Link 17
Medium/Full SDR Connector, Transmitter Circuit Y
Port Camera Frame
Grabber
Bit Assignments
1X4 - 8 Bits 1X4 - 10 Bits 1X4 - 12 Bits
Port D0 TxIn0 RxOut0 D3 Bit 0 D3 Bit 0 D3 Bit 0
Port D1 TxIn1 RxOut1 D3 Bit 1 D3 Bit 1 D3 Bit 1
Port D2 TxIn2 RxOut2 D3 Bit 2 D3 Bit 2 D3 Bit 2
Port D3 TxIn3 RxOut3 D3 Bit 3 D3 Bit 3 D3 Bit 3
Port D4 TxIn4 RxOut4 D3 Bit 4 D3 Bit 4 D3 Bit 4
Port D5 TxIn6 RxOut6 D3 Bit 5 D3 Bit 5 D3 Bit 5
Port D6 TxIn27 RxOut27 D3 Bit 6 D3 Bit 6 D3 Bit 6
Port D7 TxIn5 RxOut5 D3 Bit 7 (MSB) D3 Bit 7 D3 Bit 7
Port E0 TxIn7 RxOut7 Not Used D2 Bit 0 D2 Bit 0
Port E1 TxIn8 RxOut8 Not Used D2 Bit 1 D2 Bit 1
Port E2 TxIn9 RxOut9 Not Used D2 Bit 2 D2 Bit 2
Port E3 TxIn12 RxOut12 Not Used D2 Bit 3 D2 Bit 3
Port E4 TxIn13 RxOut13 Not Used D2 Bit 4 D2 Bit 4
Port E5 TxIn14 RxOut14 Not Used D2 Bit 5 D2 Bit 5
Port E6 TxIn10 RxOut10 Not Used D2 Bit 6 D2 Bit 6
Port E7 TxIn11 RxOut11 Not Used D2 Bit 7 D2 Bit 7
Port F0 TxIn15 RxOut15 Not Used D2 Bit 8 D2 Bit 8
Port F1 TxIn18 RxOut18 Not Used D2 Bit 9 (MSB) D2 Bit 9
Port F2 TxIn19 RxOut19 Not Used Not Used D2 Bit 10
Port F3 TxIn20 RxOut20 Not Used Not Used D2 Bit 11 (MSB)
Port F4 TxIn21 RxOut21 Not Used D3 Bit 8 D3 Bit 8
Port F5 TxIn22 RxOut22 Not Used D3 Bit 9 (MSB) D3 Bit 9
Port F6 TxIn16 RxOut16 Not Used Not Used D3 Bit 10
Port F7 TxIn17 RxOut17 Not Used Not Used D3 Bit 11 (MSB)
LVAL TxIn24 RxOut24 Line Valid Line Valid Line Valid
FVAL TxIn25 RxOut25 Not Used Not Used Not Used
DVAL TxIn26 RxOut26 Data Valid Data Valid Data Valid
Not Used TxIn23 RxOut23 Not Used Not Used Not Used
Strobe TxInCLK RxOutClk Pixel Clock Pixel Clock Pixel Clock
Table 7: Bit Assignments for 1X4 Tap Geometry - 8, 10, or 12 Bit Pixel Depth (Transmitter Circuit Y)