SC01/SC02/SC11/SC12
Sc12hw09.doc page 11 of 37 24.11.1999 V0.9
TF/WB
with all hardware interrupts, the IF (interrupt flag) is cleared when
the processor takes the interrupt, disabling the maskable interrupt
sources. However, if maskable interrupts are re-enabled by software
in the NMI interrupt service routine, via the STI instruction for
example, the fact that an NMI is currently in service does not have
any effect on the priority resolution of maskable interrupt requests.
For this reason, it is strongly advised that the interrupt service
routine for NMI should not enable the maskable interrupts. An NMI
transition from Low to High is latched and synchronized internally,
and it initiates the interrupt at the next instruction boundary. To
guarantee that the interrupt is recognized, the NMI pin must be
asserted for at least one CLK period.
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