5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
6-03-02136-031
Single link
LVDS
1
Power
MODE_CFG1(PIN48)
SWR MODE
Dual Mode Regulator Configuration
MODE_CFG0(PIN47)
10
Note:
0
3- Slave address should configure as 0xA8
2- EEPROM device should be 2-byte addressing device
1- EEPROM with a size 8K-Byte
: PIN47 4.7K pull high, PIN48 4.7K pull high
: PIN47 4.7K pull high, PIN48 4.7K pull low
: PIN47 4.7K pull low, PIN48 4.7K pull high
EEPROM MODE
Mode Configure Table(Power On Latch)
LDO MODE
EP Mode
ROM ONLY Mode
RTD2136 Supports three operation mode for system design.
ConnectNC
NCConnect
ROM ONLY MODE
Reserved 4.7K resistor pull up/low for mode selection
EEPROM Mode
EP MODE
0 Olm(R)2.2-uH(L)
LDO
SWR
Cap closed to PIN17
X
1. Cap should be closed to chip
6-19-41001-019
ሿ
ሿሿ
ሿٙ
ٙٙ
ٙᑇ
ᑇᑇ
ᑇ
:33pcs
80mils 80mils40mils 40mils
80mils
LVDS
Ղ
ՂՂ
Ղٙ
ٙٙ
ٙ
LVDS
Ղ
ՂՂ
Ղٙ
ٙٙ
ٙ
LVDS
Ղ
ՂՂ
Ղٙ
ٙٙ
ٙ
PIN48PIN47
LVDS
Ղ
ՂՂ
Ղٙ
ٙٙ
ٙ
LVDS
Ղ
ՂՂ
Ղٙ
ٙٙ
ٙ
LVDS
Ղ
ՂՂ
Ղٙ
ٙٙ
ٙ
LVDS
Ղ
ՂՂ
Ղٙ
ٙٙ
ٙ
LVDS
Ղ
ՂՂ
Ղٙ
ٙٙ
ٙ
LVDS
Ղ
ՂՂ
Ղٙ
ٙٙ
ٙ
LVDS
Ղ
ՂՂ
Ղٙ
ٙٙ
ٙ
LVDS
Ղ
ՂՂ
Ղٙ
ٙٙ
ٙ
EDP
Ղ
ՂՂ
Ղٙ
ٙٙ
ٙ
D02
BRIGHTNESS_EC_PS
DRX1p
DRX0n
DRX0p
DAUXp
DAUXn
LVDS-L0N
LVDS-LCLKP
LVDS-LCLKN
LVDS-L2P
LVDS-L2N
LVDS-L1P
LVDS-L1N
DRX1n
P_DDC_DATA
P_DDC_CLK
PANEL_PWM
LVDS-U0P
LVDS-U0N
LVDS-UCLKP
LVDS-UCLKN
LVDS-U2P
LVDS-U2N
LVDS-U1P
LVDS-U1N
LVDS-L0P
DRX0p
DRX1n
DRX1p
DAUXp
DAUXn
TEST_MODE
HPD
MODE_CFG0
MODE_CFG1
PIN17
DRX0n
PIN17 ENBLT
P_DDC_DATA
P_DDC_CLK
LVDS-LCLKN
LVDS-LCLKP
LVDS-L0N
LVDS-UCLKN
LVDS-UCLKP
LVDS-U2P
LVDS-U2N
LVDS-U1P
LVDS-U1N
LVDS-U0P
LVDS-U0N
PIN17
PANEL_PWM
LVDS-L2N
LVDS-L2P
LVDS-L1P
LVDS-L1N
LVDS-L0PLVDS-L0P
ENBLT
BRIGHTNESS_EC_PS
SMD_EDP_DAT
SMC_EDP_CLK
DP_REXT
HPD
MODE_CFG0
MODE_CFG1
3.3VS3.3VS DVCC33AVCC33
AVCC33
DVCC33
VCCK_V12
VCCK_V12
VCCK_V12
VCCK_V12
3.3VS 3.3VS
DVCC33
3.3VS3,4,5,6,7,12,13,14,15,17,18,20,24,25,26,27,28,29,30,31,32,38
EDP_TXN_13,15
EDP_TXN_03,15
EDP_AUXP3,15
EDP_AUXN3,15
EDP_TXP_03,15
EDP_TXP_13,15
LVDS-LCLKP 15
EDP_HPD3,15
LVDS-U2N 15
LVDS-LCLKN 15
LVDS-U2P 15
LVDS-U1N 15
LVDS-L2N 15
LVDS-U1P 15
LVDS-L2P 15
LVDS-L0N 15
LVDS-L1P 15
LVDS-L0P 15
LVDS-U0P 15
LVDS-UCLKP 15
LVDS-L1N 15
ENBLT 15
LVDS-U0N 15
LVDS-UCLKN 15
P_DDC_CLK 15
P_DDC_DATA 15
PANEL_PWM 15
EDP_BRIGHTNESS3
LVDS_PLVDD_EN 15
Title
Size Document Number Rev
Date: Sheet
of
6-71-N1300-D02A
2.0A
[16] RTD2136N (EDP to LVDS)
A3
16
44Wednesday, November 30, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
Size Document Number Rev
Date: Sheet
of
6-71-N1300-D02A
2.0A
[16] RTD2136N (EDP to LVDS)
A3
16
44Wednesday, November 30, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
Size Document Number Rev
Date: Sheet
of
6-71-N1300-D02A
2.0A
[16] RTD2136N (EDP to LVDS)
A3
16
44Wednesday, November 30, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
R217
12K_1%_04
LVDS
C289 0.1u_10V_X7R_04
LVDS
R482
4.7K_04
LVDS
C526
0.1u_10V_X7R_04
LVDS
R283 0_06
LVDS
C275 0.1u_10V_X7R_04
LVDS
R528 0_04
EDP
RTD2136N
U7
RTD2136N-CG
LVDS
DP_HPD
1
TEST_MODE
2
AUX_CH_N
3
AUX_CH_P
4
DP_V33
5
DP_GND
6
LANE0_P
7
LANE0_N
8
LANE1_P
9
LANE1_N
10
DP_V12
11
DP_REXT
12
CIICSCL
13
CIICSDA
14
SWR_VCCK/LDO_VCCK
15
GND
16
SWR_LX/LDO_FB
17
SWR_VDD/LDO_VDD
18
PWMOUT
19
PANEL_VCC
20
PWMIN
21
PVCC
22
TXE3+
23
TXE3-
24
TXOC-
36
TXOC+
35
TXO3-
34
TXO3+
33
TXE0-
32
TXE0+
31
TXE1-
30
TXE1+
29
TXE2-
28
TXE2+
27
TXEC-
26
TXEC+
25
MODE_CFG1
48
MODE_CFG0
47
MIICSCL
46
MIICSDA
45
BL_EN
44
VCCK
43
TXO0-
42
TXO0+
41
TXO1-
40
TXO1+
39
TXO2-
38
TXO2+
37
EPAD_GND
49
L44
*BCNR3010C-2R2M
LVDS
1 2
C278 0.1u_10V_X7R_04
LVDS
C279 0.1u_10V_X7R_04
LVDS
R472
4.7K_04
LVDS
C290 0.1u_10V_X7R_04
LVDS
C312
0.1u_10V_X7R_04
LVDS
R184 0_04
LVDS
C305
0.1u_10V_X7R_04
LVDS
R518
10K_04
R249
10K_04
LVDS
C340
2.2u_6.3V_X5R_04
LVDS
C318
4.7u_6.3V_X5R_06
LVDS
R481
*4.7K_04
LVDS
C344
0.1u_10V_X7R_04
LVDS
R531 0_04
LVDS
C528
0.1u_10V_X7R_04
LVDS
R496 0_06
LVDS
C527
2.2u_6.3V_X5R_04
LVDS
R526
*100K_04
LVDS
R250 0_06
LVDS
C276 0.1u_10V_X7R_04
LVDS
C529
*0.1u_10V_X7R_04
LVDS
C309
0.1u_10V_X7R_04
LVDS
R473
*4.7K_04
LVDS
R497 100K_04
LVDS
C326
0.1u_10V_X7R_04
LVDS
C301
2.2u_6.3V_X5R_04
LVDS
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