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Clevo NL50MU - Processor 1;12

Clevo NL50MU
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Schematic Diagrams
Processor 1/12 B - 3
B.Schematic Diagrams
Processor 1/12
Sheet 2 of 47
Processor 1/12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EVT The r mal PCB
, NTC PC B .
0 = DDP3 I2C / TBT_LSX2 pin at 1.8V
1 = DDP3 I2C / TBT_LSX2 pin at 3.3V
(internal PD 20K)
eDP PANEL
DIFF=85ohm
0 = DDP2 I2C / TBT_LSX1 pins at 1.8V
1 = DDP2 I2C / TBT_LSX1 pins at 3.3V
(internal PD 20K)
HDMI PORT
DIFF=85ohm
Enable HDMI setting
6-17-10400-730 EWTF02-104F4F-N
100k_1%_0402_NTC
1:2 (10mils:20mils)
Analog Thermal Sensor
0 = DDP4 I2C / TBT_LSX3 pins at 1.8V
1 = DDP4 I2C / TBT_LSX3 pins at 3.3
(internal PD 20K)
GPP_D11
BOARD ID
HIGH = NL40MU
LOW = NL50MU
GPP_D12
BOARD ID
HIGH = UMA
LO = W/GPU
A0
TYPE C+DP PORT
DIFF=85ohm
Length <6000 mils
0 = DDP2 I2C / TBT_LSX1 pins at 1.8V
1 = DDP2 I2C / TBT_LSX1 pins at 3.3V
(internal PD 20K)
GPP_D10
GPP_D12
BOARD_ID
GPP_E21
GPP_E21
HDMI_CTRLDATA
HDMI_CTRLCLK
GPP_D10
TC_RCOMP_N
TC_RCOMP_P
DP_RCOMP
HDMI_CTRLDATA
EDP_DISP_UTIL
DSI_DE_TE_2
GPP_D12
USB_OC1#
USB_OC2#
GPP_E19
GPP_E19
HDMI_CTRLCLK
3.3VA
3.3VA
3.3VS
3.3V
3.3VS
3.3VA
3.3VA
3.3VA
EDP_TXN_0[17]
EDP_TXN_1[17]
EDP_TXP_1[17]
EDP_TXP_0[17]
EDP_TXP_2[17]
EDP_TXN_2[17]
EDP_TXP_3[17]
EDP_TXN_3[17]
EDP_AUXN[17]
EDP_AUXP[17]
HDMI_DATA1N[16]
HDMI_DATA1P[16]
HDMI_DATA2N[16]
HDMI_DATA2P[16]
HDMI_CLOCKN[16]
HDMI_CLOCKP[16]
HDMI_DATA0N[16]
HDMI_DATA0P[16]
HDMI_HPD[16]
EDP_HPD[17]
BLON[17]
NB_ENAVDD[17]
EDP_BRIGHTNESS[17]
HDMI_CTRLDATA[16]
THERM_VOLT [24]
ANX7411_TEST_R[19]
ANX7411_HPD[19]
MDP_D2 [18]
MDP_D#2 [18]
MDP_D0 [18]
MDP_D#0 [18]
MDP_D3 [18]
MDP_D#3 [18]
MDP_D1 [18]
MDP_D#1 [18]
MDP_AUX [18]
MDP_AUX# [18]
HDMI_CTRLCLK[16]
Title
Size Document Number R e v
Date: Sheet
of
6-71-NLx0MU-D02
D02
[02] TGL U -A / DDI,TCP
A3
247Wednesday, August 18, 2021
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
Size Document Number R e v
Date: Sheet
of
6-71-NLx0MU-D02
D02
[02] TGL U -A / DDI,TCP
A3
247Wednesday, August 18, 2021
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
Size Document Number R e v
Date: Sheet
of
6-71-NLx0MU-D02
D02
[02] TGL U -A / DDI,TCP
A3
247Wednesday, August 18, 2021
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
C409
*0.1u_10V_X5R_04
R144 10K_04
NL50MU
R261 2.2K_04
TH1
EWTF02-104F4F-N
1 2
T15
R430 150_1%_04
R170 100K_04
R475
20K_1%_04
R183
100K_04
R155
*4.7K_04
R260 2.2K_04
R468
*4.7K_04
R241
4.7K_04
R45 100K_04
R256 10K_04
NL40MU
R242
*4.7K_04
T36
R172 100K_04
R50 150_1%_04
U21A
TGL_U_IP_EXT
DDIA_TXP_3
AC2
DDIA_TXN_3
AC1
DDIA_TXP_2
AD2
DDIA_TXN_2
AD1
DDIA_TXP_1
AF1
DDIA_TXN_1
AF2
DDIA_TXP_0
AG2
DDIA_TXN_0
AG1
DDIB_TXP_3
T12
DDIB_TXN_3
T11
DDIB_TXP_2
Y11
DDIB_TXN_2
Y9
DDIB_TXP_1
T9
DDIB_TXN_1
P9
DDIB_TXP_0
V11
DDIB_TXN_0
V9
TCP0_TXRX_P1
AY2
TCP0_TXRX_N1
AY1
TCP0_TXRX_P0
BB1
TCP0_TXRX_N0
BB2
TCP0_TX_P1
AM5
TCP0_TX_N1
AM7
TCP0_TX_P0
AT7
TCP0_TX_N0
AT5
TCP1_TXRX_P1
AT2
TCP1_TXRX_N1
AT1
TCP1_TXRX_P0
AU1
TCP1_TXRX_N0
AU2
TCP1_TX_P1
AD5
TCP1_TX_N1
AD7
TCP1_TX_P0
AH7
TCP1_TX_N0
AH5
TCP2_TXRX_P1
BF1
TCP2_TXRX_N1
BF2
TCP2_TXRX_P0
BE2
TCP2_TXRX_N0
BE1
TCP2_TX_P1
BD7
TCP2_TX_N1
BD5
TCP2_TX_P0
AY5
TCP2_TX_N0
AY7
TCP3_TXRX_P1
BK1
TCP3_TXRX_N1
BK2
TCP3_TXRX_P0
BJ2
TCP3_TXRX_N0
BJ1
TCP3_TX_P1
BM7
TCP3_TX_N1
BM5
TCP3_TX_P0
BH5
TCP3_TX_N0
BH7
DSI_DE_TE_2
M8
TCP1_AUX
AF5
GPP_A17/DISP_MISCC/I2S4_TXD
DF43
TCP3_AUX_P
BK5
TCP2_AUX_P
BB5
TCP1_AUX_P
AF7
TCP0_AUX_P
AP7
GPP_A15/USB_OC2#/DDSP_HPD4/DISP_MISC4/I2S4_SCLK
DK45
GPP_A20/DDSP_HPD2/DISP_MISC2/I2S5_SFRM
DF47
GPP_D11/ISH_SPI_MISO/DDP4_CTRLCLK/TBT_LSX3_TXD/GSPI2_MISO
DK23
DDIB_AUX
AD9
EDP_BKLTCTL
DG10
GPP_E18/DDP1_CTRLCLK/TBT_LSX0_TXD
DU8
GPP_A22/DDPC_CTRLDATA/I2S5_RXD
DJ47
DDIB_AUX_P
AB9
GPP_E22/DDPA_CTRLCLK/DNX_FORCE_RELOAD
DN4
DDIA_AUX_P
AJ2
EDP_VDDEN
DM8
GPP_A21/DDPC_CTRLCLK/I2S5_TXD
DG47
GPP_H17/DDPB_CTRLDATA
DK27
DDI_RCOMP
AB1
DDIA_AUX
AJ1
GPP_D10/ISH_SPI_CLK/DDP3_CTRLDATA/TBT_LSX2_RXD/GSPI2_CLK
DM23
EDP_BKLTEN
DN8
GPP_H16/DDPB_CTRLCLK/PCIE_LNK_DOWN
DM29
GPP_D9/ISH_SPI_CS#/DDP3_CTRLCLK/TBT_LSX2_TXD/GSPI2_CS0#
DN23
GPP_E23/DDPA_CTRLDATA
DT6
GPP_A14/USB_OC1#/DDSP_HPD3/I2S3_RXD/DISP_MISC3/DMIC_CLK_B1
DH52
TCP2_AUX
BB7
TC_RCOMP
AN1
GPP_A18/DDSP_HPDB/DISP_MISCB/I2S4_RXD
DG43
TCP0_AUX
AP5
GPP_A19/DDSP_HPD1/DISP_MISC1/I2S5_SCLK
DF45
GPP_E14/DDSP_HPDA/DISP_MISCA
DR5
DISP_UTILS/DSI_DE_TE_1
CE4
GPP_D12/ISH_SPI_MOSI/DDP4_CTRLDATA/TBT_LSX3_RXD/GSPI2_MOSI
DN21
TC_RCOMP_P
AN2
GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD
DD6
GPP_E20/DDP2_CTRLCLK/TBT_LSX1_TXD
DF6
GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD
DV8
TCP3_AUX
BK7

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