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Clevo NL50MU - 15 I;O Board 1; 15 I;O Board 2

Clevo NL50MU
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Schematic Diagrams
15” I/O Board 1 B - 45
B.Schematic Diagrams
15” I/O Board 1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB2.0
HEAD-PHONE
COMBO JACK
Layout trace > 40 mil ,
suggest to implement shapes.
Layout note:
Headphone > 10mi ls
phon e j ack
R/L GND 3*
HP-L
GND
GND
HP-R
3*R/L
Footprint=FP201-040X1-0M pin1 fix
FOR 15" I/O BOARD
USB2.0
0201
W_HEADPHONE_L_DEPOP
W_HEADPHONE_R_DEPOP
W_SLEEVE_CONN
W_HPOUT-JD
W_RING2_CONN
W_HPOUT-JD
W_HPOL_CON
W_HPOR_CON
W_RING2_CON
W_EARPHONE_R
W_EARPHONE_LW _HEADPHONE_L_DEPOP
W_HEADPHONE_R_DEPOP
W_SLEEVE_CON
W_UIM_DATA
W_SIM_DET
W_UIM_RST
W_UIM_PWR
W_UIM_CLK W_UIM_VPP
W_UIM_DATA
W_SIM_DET
W_UIM_CLK
W_UIM_RST
W_UIM_PWR
W_RING2_CONN
W_SLEEVE_CONN W_SLEEVE_CON_R
WGND
W5V
WGNDWUDG
WUDG
WUDG WUDG
WUDG
W3.3V
W3.3VS
WGND
WGND WGND WGND
WGND
WGND
WUDG
WGND
WUDG
WGND WGND WGND
WGND
WGND
W_USB_PP5 [45]
W_USB_PN5 [45]
W_USB_PW R_EN# [45]
W5V[45]
W_USB_PN3 [45]
W_USB_PP3 [45]
Title
Size Document Number Re v
Date: Sheet
of
D01
[44] NL50MU I/O BOARD_1_W
A3
44 47Wednesday, August 18, 2021
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
6-71-NLx0MU-D02
Title
Size Document Number Re v
Date: Sheet
of
D01
[44] NL50MU I/O BOARD_1_W
A3
44 47Wednesday, August 18, 2021
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
6-71-NLx0MU-D02
Title
Size Document Number Re v
Date: Sheet
of
D01
[44] NL50MU I/O BOARD_1_W
A3
44 47Wednesday, August 18, 2021
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
6-71-NLx0MU-D02
WJ_MB1
FP201H-040S10M
PCB Footprint = FP201-040X1-0M
P/N = 6-20-94K20-140
15"_IO_BD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GND1
GND2
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
WJ_COMBO1
2SJ3127-000111F
15"_IO_BD
PCB Footprint = 2sj3127-000111f
P/N = 6-20-B28X0-006
3
6
1
5
2
4
3WR1 *0_02
15"_IO_BD
WC10 0.1u_25V_X5R_04 15"_IO_BD
WC1 0.1u_25V_X5R_04 15"_IO_BD
WL1 FCM1005MF-300T03 15"_IO_BD
7WR1 *0_02
15"_IO_BD
15"_IO_BD_LTE
WT1
WD1
*AVLC5S02100
15"_IO_BD
12
WD2
*AVLC5S02100
15"_IO_BD
12
WC2
0_04
15"_IO_BD
4WR1 *0_02
15"_IO_BD
WC4
100p_50V_NPO_04
15"_IO_BD
8WR1 *0_02
15"_IO_BD
WD4 3.3V
15"_IO_BD
1 2
WR4 82_04
15"_IO_BD
WL3 FCM1005KF-121T03 15"_IO_BD
1WR1 *0_02
15"_IO_BD
1
WH4
*MTH7_0D2_3
MTH7_0D2_3
<FUNCTION>
2
3 5
4
WC9 0.01u_16V_X7R_04
15"_IO_BD_LTE
WH1
*H3_9D2_3
<FUNCTION>
H3_9D2_3
WR2 *0402_short
WR6 *4.7K_04 15"_IO_BD_LTE
WC3
100p_50V_NPO_04
15"_IO_BD
2WR1 *0_02
15"_IO_BD
WL4 FCM1005MF-300T03 15"_IO_BD
6WR1 *0_02
15"_IO_BD
WH5
*H7_0D5_8
<FUNCTION>
H7_0D5_8
WJ_MB2
FP225H-008S11M
PCB Footprint = fp225h-008gxxxm_r
P/N = 6-20-94K30-108
15"_IO_BD_LTE
1
2
3
4
5
6
7
8
WR5 82_04
15"_IO_BD
1
WH2
*MTH7_0D2_3
MTH7_0D2_3
<FUNCTION>
2
3 5
4
WC5
*0.1u_6.3V_X5R_02
15"_IO_BD_LTE
WD5 *PESD5V0R1BSF
15"_IO_BD
1 2
WH3
*H4_0D2_3
<FUNCTION>
H4_0D2_3
WC8
22p_50V_NPO_04
15"_IO_BD_LTE
WR1 *0_04 15"_IO_BD
WD3
*AVLC5S02100
15"_IO_BD
12
WL2 FCM1005KF-121T03 15"_IO_BD
WC6
100p_50V_NPO_04
15"_IO_BD
5WR1 *0_02
15"_IO_BD
(TOP VIEW)
WJ_SIM1
21-6012-01 15"_IO_BD_LTE
PCB Footprint = 21-6012-0x
P/N = 6-86-2B010-007
UIM_DATA
C4
UIM_VPP
C6
UIM_GND
C5
UIM_PWR
C1
UIM_RST
C2
UIM_CLK
C3
GND1
GND1
UIM_I/O
C7
UIM_MCMD
C8
DETECT_SW
SW1
GND2
GND2
GND3
GND3
GND4
GND4
WR3 0_04
15"_IO_BD
WC7 0.1u_25V_X5R_04 15"_IO_BD
Sheet 44 of 47
15” I/O Board 1

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