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Clevo NL50MU - Page 64

Clevo NL50MU
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Schematic Diagrams
B - 10 Processor 8/12
B.Schematic Diagrams
Processor 8/12
Sheet 9 of 47
Processor 8/12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
38.4Mhz
Use a shielded crystal GND and
isolation external GND
ijıŮ Ūŭ Ŵ
BOTTOM
ijıŮ Ūŭ Ŵ
RTC CLEAR
ijıŮ Ūŭ Ŵ
M.2 CNVI MODES
LOW-> INTEGRATED CNVI ENABLE
HIGH-> INTEGRATED CNVI DISABLE
NO INTERNAL PU/PD
SAMPLING - RSMRSTB
PCIE GEN4 only use
32.768KHz
6-22-32R76-0BN
WLAN_CLKREQ# PU 10K_04 IN PCH SIDE
Processor Pullups/Pull downs
0 = 38.4 MHz (default)
1 = 24 MHz
DIFF=85ohm
M.2 PCIE GEN4 X4
WLAN
SDCARD
LAN
M.2 PCIE GEN3X4 / SATA
CLKPUT_PCIE0
CLKPUT_PCIE1
CLKPUT_PCIE2
CLKPUT_PCIE3
CLKPUT_PCIE4
CLKREQ0
CLKREQ1
CLKREQ2
CLKREQ3
CLKREQ4
OSCAR 08_11_2020
A0
XTAL 25MHz 20ppm CL<=12pF
GREEN CLOCK
6-22-25R0 0-1 B6
CNVI_WT_RCOMP
CNVI_RGI_DT
CNVI_BRI_DT
SUSCLK_R
XTAL38.4_IN
XCLK_BIASREF
SRTCRST#
RTCRST#
XTAL38.4_OUT
RTCRST#
RTC_VBAT_1
SRTCRST#
CSI_RCOMP
CNVI_RGI_DT
PM_CLKRUN#
SSD1_CLKREQ#
WLAN_CLKREQ#
GLAN_CLKREQ#
CNVI_BRI_DT
CARD_CLKREQ#
CARD_CLKREQ#
WLAN_CLKREQ#
GLAN_CLKREQ#
SSD1_CLKREQ#
GCLK_32K_RTC
GCLK_32K_RTC
RTC_VBAT
RTC_VBAT
VDD3
VCC_RTC
1.8VA
3.3VS
3.3VS
1.8VA
VDD3
VDD3
VCC_RTC
VDD3
RTC_VBAT
CNVI_GNSS_PA_BLANKING [25]
CNVI_WR_D1N [25]
CNVI_WR_D1P [25]
CNVI_WR_D0N [25]
CNVI_WR_D0P [25]
CNVI_WT_D0P [25]
CNVI_WT_D0N [25]
CNVI_WT_D1P [25]
CNVI_WT_D1N [25]
CNVI_WT_CLKN [25]
CNVI_WT_CLKP [25]
CNVI_WR_CLKN [25]
CNVI_WR_CLKP [25]
CLK_PCIE_GLAN[29]
CLK_PCIE_GLAN#[29] SUS_CLK [25]
SM_INTRUDER#[10]
CLK_PCIE_WLAN#[25]
CLK_PCIE_WLAN[25]
CLK_PCIE_SSD1[26]
CLK_PCIE_SSD1#[26]
PM_CLKRUN#[24]
CLK_PCIE_CARD[29]
CLK_PCIE_CARD#[29]
WLAN_CLKREQ# [25]
CARD_CLKREQ# [29]
GLAN_CLKREQ# [29]
SSD1_CLKREQ# [26]
CNVI_BRI_DT [25]
CNVI_BRI_RSP [25]
CNVI_RGI_DT [25]
CNVI_RGI_RSP [25]
Title
Size Document Number Re v
Date: Sheet
of
6-71-NLx0MU-D02
D02
[09] TGL U -J,K / CNVI,CLK,CSI
Custom
947Wednesday, August 18, 2021
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NLx0MU
Title
Size Document Number Re v
Date: Sheet
of
6-71-NLx0MU-D02
D02
[09] TGL U -J,K / CNVI,CLK,CSI
Custom
947Wednesday, August 18, 2021
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NLx0MU
Title
Size Document Number Re v
Date: Sheet
of
6-71-NLx0MU-D02
D02
[09] TGL U -J,K / CNVI,CLK,CSI
Custom
947Wednesday, August 18, 2021
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NLx0MU
R528 330_04
R507 *0_02
R164 150_1%_04
R221 10K_04
R190
*4.7K_04
C418 15p_50V_NPO_04
R178
*4.7K_04
R145
*4.7K_04
C389 10p_50V_NPO_04
C426 0.1u_16V_X5R_02
C397 10p_50V_NPO_04
R287 1M_04
C244
1u_6.3V_X5R_04
C440 *12p_50V_NPO_04
R274 10K_04
U28
SLG3NB3426VTR
PCB Footprint = TQFN16_2X3MM-GCLK
X2-OUT
16
NC
11
VIOE_19.2M
8
GND
5
19.2M
6
25M
4
GND
7
32.768K
9
VRTC
10
VIO_25M
3
GND
13
VOUT
14
X1-IN
1
PAD
17
VDD
2
V3.3A
15
NC
12
R159
*20K_04
C
A
A
D37
BAT54CW H
1
2
3
R152
60.4_1%_04
R489 *0_04
R258 8.2K_04
R296
*1M_04
C248
1u_6.3V_X5R_04
R504 33_04
X2
19001-X-016-3
2 1
3 4
U21K
TGL_U_IP_EXT
XTAL_OUT
DM1
XTAL_IN
DL1
RTCX2
DT47
RTCX1
DR47
GPP_D7/SRCCLKREQ2#
DT30
GPP_D8/SRCCLKREQ3#
DT24
GPP_D5/SRCCLKREQ0#
DW30
RTCRST#
DN37
GPP_D6/SRCCLKREQ1#
DV30
CLKOUT_PCIE_P0
CN7
CLKOUT_PCIE_P1
BY4
CLKOUT_PCIE_P2
CB4
CLKOUT_PCIE_P3
CL7
CLKOUT_PCIE_P4
BW4
CLKOUT_PCIE_P5
CB2
CLKOUT_PCIE_P6
BW1
SRTCRST#
DK37
GPP_F19/SRCCLKREQ6#
DU14
GPD8/SUSCLK
DW41
XCLK_BIASREF
DJ5
GPP_H11/SRCCLKREQ5#
DF23
CLKOUT_PCIE_N0
CN8
CLKOUT_PCIE_N1
BY3
CLKOUT_PCIE_N2
CB5
CLKOUT_PCIE_N3
CL8
CLKOUT_PCIE_N4
BW5
CLKOUT_PCIE_N5
CB1
CLKOUT_PCIE_N6
BW2
GPP_H10/SRCCLKREQ4#
DG25
R39 150_1%_04
R204 10K_04
U21J
TGL_U_IP_EXT
CNVI_WR_CLKN
DW44
CNVI_WR_CLKP
DV44
CNVI_WR_D0N
DT43
CNVI_WR_D1N
DV43
CNVI_WT_D0N
DR49
CNVI_WT_D1N
DM47
CSI_C_DN_0
N20
CSI_C_DP_0
L20
CSI_C_DN_1
N18
CSI_C_DP_1
L18
CSI_C_DN_3
B15
CSI_C_DP_3
A15
CSI_C_DN_2
E15
CSI_C_DP_2
D15
CSI_E_DN_0/CSI_F_DN_3
E18
GPP_D4/IMGCLKOUT_0/BK4/SBK4
DR30
GPP_H22/IMGCLKOUT3
DM25
CSI_F_CLK_P
A20
GPP_H21/IMGCLKOUT2
DN25
GPP_H23/IMGCLKOUT4
DK25
CSI_E_CLK_P
C16
CSI_B_CLK
N16
CSI_E_CLK
D16
CSI_F_DN_0
D20
CSI_F_DP_0
E22
CSI_F_DN_1
B22
CSI_F_DP_1
D22
CSI_B_CLK_P
L16
CSI_C_CLK
H20
GPP_F6/CNV_PA_BLANKING
DV15
CNVI_WT_RCOMP
DN51
CNVI_WT_D0P
DN49
CNVI_WT_D1P
DK47
CSI_B_DN_3
N14
CSI_B_DP_3
L14
CSI_B_DN_2
H14
CSI_B_DP_2
G14
CSI_B_DN_0
H18
CSI_B_DP_0
G18
CSI_B_DN_1
G16
CSI_B_DP_1
H16
CSI_E_DP_1/CSI_F_DP_2
B18
CSI_RCOMP
K14
CSI_E_DN_1/CSI_F_DN_2
A18
GPP_F0/CNV_BRI_DT/UART0_RTS#
DF17
GPP_F3/CNV_RGI_RSP/UART0_CTS#
DJ13
GPP_F4/CNV_RF_RESET#
DK10
GPP_F1/CNV_BRI_RSP/UART0_RXD
DF15
GPP_F2/CNV_RGI_DT/UART0_TXD
DG13
CNVI_WR_D0P
DR44
CNVI_WR_D1P
DU43
CNVI_WT_CLKN
DN47
CNVI_WT_CLKP
DN45
CSI_F_CLK
B20
GPP_F5/MODEM_CLKREQ/CRF_XTAL_CLKREQ
DJ10
CSI_C_CLK_P
G20
CSI_E_DP_0/CSI_F_DP_3
D18
GPP_H20/IMGCLKOUT1
DJ25
R286 20K_1%_04
X1
XTAL19001-X-022-3
1 2
34
C451 0.1u_16V_X5R_02
J_RTC1
50271-0020N-001
85204-02R
6-20-43130-102
1
2
C427 0.1u_6.3V_X5R_02
R213 10K_04
R285 20K_1%_04
C419 15p_50V_NPO_04
C435 0.1u_16V_X5R_02
R509
0_02
C254
0.1u_6.3V_X5R_02
C439 *12p_50V_NPO_04
C438 22u_6.3V_X5R_06
R539
1K_04
R527 0_04
X3
*XDMCZLNDDD-0.032768MHz
1 2
R508 *0_02
C425 2.2u_6.3V_X5R_04
C436 0.1u_16V_X5R_02
R461
200K_1%_04
JOPEN1
*OPEN_10mil-1MM
12
R524
*10M_06

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