5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
This is bit 1 of a total of 4-bit
encoded pin
straps for boot configuration.
Refer to Boot Strap 0 (on GPP_C5)
for the encoding.
(internal PD 20K)
This is bit 3 of a total of
4-bit encoded pin straps for
boot
configuration.
Refer to Boot Strap 0 (on
GPP_C5) for the encoding.
(internal PD 20K)
This is bit 2 of a total of
4-bit encoded pin straps for
boot
configuration.
Refer to Boot Strap 0 (on
GPP_C5) for the encoding.
(internal PD 20K)
This strap should sample LOW.
There should NOT be any onboard
device driving it to opposite direction
during strap sampling.
(internal PD 20K)
PU/PD for JTAG signals
AC_IN# LOW -->H_PROCHOT# Setting HI Input
AC_IN# HIGH -->H_PROCHOT# Delay 3 sec Change Output Low.
Form power
LENGTH <500MILS
Form EC
VA AC_IN# H_PROCHOT_EC# H_PROCHOT#
01
10
0(keep 3 sec) to 1 0(keep 3 sec) to 1
0=down freq to 800MHz
11
SWI#(WAKE#)--Used by the EC to wake the host while in so as an SCI event;
wake on LID switch or AC insertion.
SCI#---Sent as GP alert resulting in ACPI method to be run by the OS.
SMI#---Sent as GP alert resulting in SMI code to be run by the BIOS.
A0
follow TGL
CPU NUT, BOT M.2 SSD NUT, BOT
D02ADelH12
㰺㚱
VALUE
⎒㚱
P/N
㰺㚱
VALUE
⎒㚱
P/N
㰺㚱
VALUE
⎒㚱
P/N
D02 modify
20210622
GPP_H0_RTD3 GPP_H1 GPP_H2 GPP_F10
DBG_PMODE
GPP_F10
GPP_H2
GPP_H1
H_CATERR#
H_PROCHOT#_D
H_PECI_ISO
THERMTRIP#
H_PROCHOT#
SMI#
PCH_OPI_RCOMP
CPU_POPIRCOMP
TP_ATTN#_R
XDP_TRST#
XDP_TCLK
XDP_TDI
XDP_TDO
XDP_TMS
PCH_JTAG_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_TCLK
XDP_PREQ#
XDP_PRDY#
CPU_EAR
CNVI_WAKE#
XDP_TCLK
XDP_TRST#
CPU_EAR
SMI#
SCI#
SCI#
GPP_H0_RTD3
3.3VA 3.3VA 3.3VA 3.3VA
VCCST
VCCST
3.3VS
VCCSTG
VCCSTG
3.3VA
VCCSTG_OUT_LGC
3.3VA
H_PECI[24]
CNVI_WAKE#[25]
H_PROCHOT#[38]
VRALERT#_PD[11]
SMI#[24]
H_PROCHOT_EC[24]
AC_IN#[24,37]
TP_ATTN#[29]
Title
Size Document Number R e v
Date: Sheet
of
6-71-NLx0MU-D02
D02
[13] TGL U -U / CFG
A3
13 47Wednesday, August 18, 2021
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NLx0MU
Title
Size Document Number R e v
Date: Sheet
of
6-71-NLx0MU-D02
D02
[13] TGL U -U / CFG
A3
13 47Wednesday, August 18, 2021
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NLx0MU
Title
Size Document Number R e v
Date: Sheet
of
6-71-NLx0MU-D02
D02
[13] TGL U -U / CFG
A3
13 47Wednesday, August 18, 2021
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NLx0MU
R415 *51_04
R110 49.9_1%_04
R41
1K_04
1
H5
*MTH9_5D5_5
MTH9_5D5_5
2
3 5
4
M5
*M-MARK
H_SSD1
6-34-L140S-010
H7_0B6_0D3_7
R486
*4.7K_04
R30 1K_04
M1
*M-MARK
R206 10K_04
R414 51_04
R406
100K_04
H_CPU2
6-34-W54CS-010
H7_0B6_0D3_7
1
H13
*MTH9_5D5_5
MTH9_5D5_5
2
3 5
4
R412 51_04
R407
100K_04
M4
*M-MARK
R153 *1K_04
S
D
G
Q23B
MTDK3S6R
5
34
H3
*H5_0B4_0D2_0
H5_0B4_0D2_0
M8
*M-MARK
1
H6
*MTH9_5D5_5
MTH9_5D5_5
2
3 5
4
U21U
TGL_U_IP_EXT
PECI
BK9
PCH_OPIRCOMP
CB9
DBG_PMODE
DF4
PCH_JTAGX
D8
PROC_TRST#
K4
GPP_H2
DF31
PROC_POPIRCOMP
CT39
GPP_H1
DV32
GPP_E3/CPU_GP0
DU5
GPP_E7/CPU_GP1
DF8
GPP_H0
DW32
PROC_PRDY#
D11
GPP_F10
DT14
PCH_TMS
A9
PROC_TCK
B6
PROC_TDO
D12
CATERR#
M7
PCH_TCK
A7
PCH_TDI
B12
THRMTRIP#
M5
EAR_N_TEST_NCTF
G1
GPP_B3/CPU_GP2
DB41
GPP_B4/CPU_GP3
DB42
PROCHOT#
E2
PCH_TRST#
H4
PCH_TDO
E12
PROC_PREQ#
C11
TP_1
CW12
GPP_F7
DT15
GPP_H19/TIME_SYNC0
DJ27
TP_2
CM39
PROC_TMS
B9
GPP_F9
DR15
PROC_TDI
A12
R413 51_04
M3
*M-MARK
R143
*4.7K_04
T5
R116 0_04
R411 *1K_04
H8
*O197X216B157X177D77
O197X216B157X177D77
1
H7
*MTH9_5D5_5
MTH9_5D5_5
2
3 5
4
T29
M7
*M-MARK
D8 *RB751S-40H
AC
R417 51_04
R95 49.9_1%_04
R34
*1K_04
R35
100K_04
R47 1K_04
S
D
G
Q23A
MTDK3S6R
2
61
H1
*C111D111N
C111D111N
R78 *14mil_02
R226
*4.7K_04
R38 0_04
R418 *51_04
H9
*C111D111N
C111D111N
1
H14
*MTH9_5D5_5
MTH9_5D5_5
2
3 5
4
R408
0_02
D11
RB751S-40H
AC
H2
*C111D111N
C111D111N
H_CPU3
6-34-W54CS-010
H7_0B6_0D3_7
R48 1K_04
H10
*C111D111N
C111D111N
R410 499_1%_04
1
H11
*MTH9_5D5_5
MTH9_5D5_5
2
3 5
4
R32 *200K_04
H_CPU1
6-34-W54CS-010
H7_0B6_0D3_7
R487
*4.7K_04
R199 10K_04
R409
*0_04
M2
*M-MARK
1
H12
*MTH9_5D5_5
MTH9_5D5_5
2
3 5
4
C335
*47p_25V_NPO_02
H4
*O197X216B157X177D77
O197X216B157X177D77
R31 *1K_04
M6
*M-MARK
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