9.2 Working Principle of TIMER2
The input clock of the TIMER2 mod is the system instruction clock (F
CPU
) or the external oscillator
(32.768kHz). The clock is input to the TIMER2 pre-scaler. There are several division ratios to choose from:
1:1, 1:4 or 1:16. pre-scaler the output is then used to increment TMR2 register.
Continue to compare the values of TMR2 and PR2 to determine when they match. TMR2 will increase
from 00h until it matches the value in PR2. When a match occurs, the following two events will occur:
⚫ TMR2 is reset to 00h in the next increment period;
⚫ TIMER2 post-scaler increments.
The matching output of the TIMER2 and PR2 comparator is then input to the post-scaler of TIMER2. The
post-scaler has a prescaler ratio of 1:1 to 1:16 to choose from. The output of the TIMER2 post-scaler is used
to make PIR1 The TMR2IF interrupt flag bit of the register is set to 1.
Both TMR2 and PR2 registers can be read and written. At any reset, TMR2 register is set to 00h and
PR2 register is set to FFh.
Enable TIMER2 by setting the TMR2ON bit of the T2CON register; disable TIMER2 by clearing the
TMR2ON bit.
The TIMER2 pre-scaler is controlled by the T2CKPS bit of the T2CON register; the TIMER2 postscaler
is controlled by the TOUTPS bit of the T2CON register.
The pre-scaler and postscaler counters are cleared under the following conditions:
⚫ TMR2 write operation
⚫ T2CON write operation
⚫ Any device reset occurs (power-on reset, watchdog timer reset, or under voltage reset).
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