GR712RC-QSG
November 2018, Version 1.0
22 www.cobham.com/gaisler
5.8. Interrupts
When using a multiprocessor OS like RTEMS-AMP, Linux or VxWorks the default IRQ for interprocessor cross-
calls, IRQ 14, clashes with the MIL-1553, Ethernet and Telecommand IP cores. The OS may need to be recon-
figured by changing the IRQ value, which is usually a define, in the source code of your operating system and
rebuilding it. This should not be an issue with single-core RTEMS.
5.9. GRMON Debug Link Limitations
The GR712RC does not support debugging over Ethernet. EDCL is not included in the Ethernet core design. Refer
to Chapter 3 for an introduction to the supported debug links.
5.10. MIL-1553
The 1553 IP core in the GR712RC is an Actel Core1553BRM with an AMBA adapter developed by Cobham
Gaisler. Actel's core is documented on Actel's website [http://www.actel.com/ipdocs/Core1553BRM_HB.pdf],
while the wrapper is documented in [RD-2].
The correct RTEMS driver to use for the MIL-1553 core is B1553BRM. This should not be confused with
GR1553B which is the driver for Cobham Gaisler's in-house developed core. To use the core, users need to set up
clock gating and clock selection with the general purpose register.
NOTE: There are some restrictions on what clock frequencies can be used, see Section 3.3 of [RD-2].
Users also need to set a register inside the Core1553BRM to match the BRM frequency used. This is usually done
by the driver in the RTEMS/VxW case (default is 24 MHz). Below is provided an example routine for setting up
GR712RC clocking to external 24 MHz clock. This routine can be used, for instance, as mkprom2 bdinit. In this
case it needs to be compiled with -O2 to avoid using stack.
static void gr712_init(void)
{
volatile unsigned long *p;
/* Select external 1553 clk through GPREG */
p = (volatile unsigned long *)0x80000600;
*p |= 0x20;
/* Ungate 1553 clock and reset */
p = (volatile unsigned long *)0x80000D00;
p[0] = (1<<11);
p[2] = (1<<11);
p[1] = (1<<11);
p[2] = 0;
p[0] = 0;
/* Set Core1553BRM to 24 MHz operation */
p = (volatile unsigned long *)0xFFF00000;
p[32] |= 3;
}
5.11. CAN multiplexing
The CAN bus outputs are disabled at reset and should be enabled before use by programming the CAN multiplexer.
To enable OC-CAN1 on CAN bus A and OC-CAN2 on CAN bus B, the following GRMON2 command can be
used:
wmem 0x80000500 3
There is also an RTEMS driver named canmux for the CAN bus multiplexor distributed with the RCC distribution.
The multiplexer is programmed by opening the file "/dev/canmux" and requestiong an IOCTL. An example of this
is provided in the RCC example src/samples/gr712/rtems-satcan.c.
5.12. Concurrent CAN and Ethernet
Ethernet and CAN pins are conflicting in the GR712RC switch matrix so the functions can not be used concur-
rently. It is possible to switch between the interfaces at run-time.
The conflict comes from a set of pins which are activated when the CAN interface is enabled. These pins are
described as "proprietary" in the rightmost column of [RD-2], table named I/O switch matrix pin description. The
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