Compaq Deskpro EP 6233 - List of Figures

Technical Reference Guide
Compaq Deskpro EP Series Personal Computers
First Edition – April 1998
ix
LIST OF FIGURES
F
IGURE
2–1. C
OMPAQ
D
ESKPRO
EP P
ERSONAL
C
OMPUTERS WITH
M
ONITOR
.......................................... 2-1
F
IGURE
2–2. C
ABINET
L
AYOUT
, F
RONT
V
IEW
....................................................................................... 2-3
F
IGURE
2–3. C
ABINET
L
AYOUT
, R
EAR
V
IEW
......................................................................................... 2-3
F
IGURE
2–4. C
HASSIS
L
AYOUT
, T
OP
V
IEW
............................................................................................ 2-4
F
IGURE
2–5. S
YSTEM
B
OARD
L
AYOUT
, C
OMPONENT
S
IDE
..................................................................... 2-5
F
IGURE
2–6. S
YSTEM
A
RCHITECTURE
, B
LOCK DIAGRAM
........................................................................ 2-7
F
IGURE
2–7. P
ROCESSOR
A
RCHITECTURAL
C
OMPARISON
D
IAGRAM
........................................................ 2-8
F
IGURE
3–1. 66-MH
Z
S
LOT
1 P
ROCESSOR
/M
EMORY
S
UBSYSTEM
A
RCHITECTURE
................................... 3-2
F
IGURE
3–2. C
ELERON
P
ROCESSOR
I
NTERNAL
A
RCHITECTURE
............................................................... 3-3
F
IGURE
3–3. P
ENTIUM
II P
ROCESSOR
I
NTERNAL
A
RCHITECTURE
............................................................. 3-3
F
IGURE
3–4. S
YSTEM
M
EMORY
M
AP
..................................................................................................... 3-7
F
IGURE
3–5. 100-MH
Z
S
LOT
1 P
ROCESSOR
/M
EMORY
S
UBSYSTEM
A
RCHITECTURE
................................. 3-9
F
IGURE
3–6. 350-/400-MH
Z
P
ENTIUM
II P
ROCESSOR
I
NTERNAL
A
RCHITECTURE
.................................. 3-10
F
IGURE
4–1. PCI B
US
D
EVICES AND
F
UNCTIONS
..................................................................................... 4-2
F
IGURE
4–2. PCI B
US
C
ONNECTOR
(32-B
IT
T
YPE
).................................................................................4-3
F
IGURE
4–3. T
YPE
0 C
ONFIGURATION
C
YCLE
........................................................................................ 4-6
F
IGURE
4–4. PCI C
ONFIGURATION
S
PACE
M
AP
...................................................................................... 4-7
F
IGURE
4–5. AGP 1X D
ATA
T
RANSFER
(P
EAK
T
RANSFER
R
ATE
: 266 MB/
S
)........................................ 4-12
F
IGURE
4–6. AGP 2X D
ATA
T
RANSFER
(P
EAK
T
RANSFER
R
ATE
: 532 MB/
S
)........................................ 4-13
F
IGURE
4–7. AGP B
US
C
ONNECTOR
................................................................................................... 4-15
F
IGURE
4–8. ISA B
US
B
LOCK
D
IAGRAM
................................................................................................ 4-16
F
IGURE
4–9. ISA E
XPANSION
C
ONNECTOR
.......................................................................................... 4-17
F
IGURE
4–10. M
ASKABLE
I
NTERRUPT
P
ROCESSING
, B
LOCK
D
IAGRAM
.................................................. 4-23
F
IGURE
4–11. C
ONFIGURATION
M
EMORY
M
AP
.................................................................................... 4-29
F
IGURE
5–1. 40-P
IN
IDE C
ONNECTOR
. ................................................................................................. 5-9
F
IGURE
5–2. 34-P
IN
D
ISKETTE
D
RIVE
C
ONNECTOR
.............................................................................. 5-14
F
IGURE
5–3. S
ERIAL
I
NTERFACE
C
ONNECTOR
(M
ALE
DB-9
AS VIEWED FROM REAR OF CHASSIS
)........... 5-15
F
IGURE
5–4. P
ARALLEL
I
NTERFACE
C
ONNECTOR
(F
EMALE
DB-25
AS VIEWED FROM REAR OF CHASSIS
).. 5-27
F
IGURE
5–5. 8042-T
O
-K
EYBOARD
T
RANSMISSION OF
C
ODE
ED
H
, T
IMING
D
IAGRAM
............................ 5-28
F
IGURE
5–6. K
EYBOARD OR
P
OINTING
D
EVICE
I
NTERFACE
C
ONNECTOR
............................................... 5-34
F
IGURE
5–7. U
NIVERSAL
S
ERIAL
B
US
C
ONNECTOR
(
ONE OF TWO AS VIEWED FROM REAR OF CHASSIS
)..... 5-36
F
IGURE
6–1. P
OWER
S
UPPLY
A
SSEMBLY AND
A
SSOCIATED
C
IRCUITRY
, B
LOCK
D
IAGRAM
....................... 6-1
F
IGURE
6–2. P
OWER
C
ABLE
D
IAGRAM
.................................................................................................. 6-5
F
IGURE
6–3. L
OW
V
OLTAGE
R
EGULATOR
C
IRCUITRY
, B
LOCK
D
IAGRAM
................................................. 6-6
F
IGURE
6–4. G
ENERAL
S
IGNAL
D
ISTRIBUTION
, F
UNCTIONAL
B
LOCK
D
IAGRAM
....................................... 6-7
F
IGURE
6–5. F
RONT
P
ANEL
(B
EZEL
) C
ONTROL
/I
NDICATOR
C
ONNECTOR
................................................ 6-8
F
IGURE
6–6. W
AKE
-O
N
-LAN NIC C
ONNECTOR
.................................................................................... 6-8
F
IGURE
B–1. ASCII C
HARACTER
S
ET
...................................................................................................B-1