Compaq Deskpro EP 6233 - List of Tables

Technical Reference Guide
Compaq Deskpro EP Series Personal Computers
First Edition – April 1998
xi
LIST OF TABLES
T
ABLE
1–1. A
CRONYMS AND
A
BBREVIATIONS
....................................................................................... 1-3
T
ABLE
2–1. A
RCHITECTURAL
C
OMPARISON
............................................................................................. 2-6
T
ABLE
2–2. S
UPPORT
C
HIPSETS
............................................................................................................ 2-9
T
ABLE
2–3. G
RAPHICS
S
UBSYSTEM
C
OMPARISON
................................................................................ 2-10
T
ABLE
2–4. E
NVIRONMENTAL
S
PECIFICATIONS
.................................................................................... 2-11
T
ABLE
2–5. E
LECTRICAL
S
PECIFICATIONS
........................................................................................... 2-11
T
ABLE
2–6. P
HYSICAL
S
PECIFICATIONS
............................................................................................... 2-11
T
ABLE
2–7. D
ISKETTE
D
RIVE
S
PECIFICATIONS
..................................................................................... 2-12
T
ABLE
2–8. 8
X
CD-ROM D
RIVE
S
PECIFICATIONS
................................................................................ 2-12
T
ABLE
2–9. H
ARD
D
RIVE
S
PECIFICATIONS
........................................................................................... 2-13
T
ABLE
3–1. P
ROCESSOR
/M
EMORY
A
RCHITECTURAL
C
OMPARISON
........................................................... 3-1
T
ABLE
3–2. P
ENTIUM
II COVINGTON P
ROCESSOR
B
US
/C
ORE
S
PEED
S
WITCH
S
ETTINGS
....................... 3-4
T
ABLE
3–3. SPD A
DDRESS
M
AP
(SDRAM DIMM).................................................................................3-6
T
ABLE
3–4. H
OST
/PCI B
RIDGE
C
ONFIGURATION
R
EGISTERS
(443EX, F
UNCTION
0) ................................ 3-8
T
ABLE
3–5. P
ENTIUM
II M
ICROPROCESSOR
B
US
/C
ORE
S
PEED
S
WITCH
S
ETTINGS
.................................. 3-11
T
ABLE
3–6. H
OST
/PCI B
RIDGE
C
ONFIGURATION
R
EGISTERS
(443BX, F
UNCTION
0) .............................. 3-13
T
ABLE
4–1. PCI B
US
C
ONNECTOR
P
INOUT
............................................................................................ 4-3
T
ABLE
4–2. PCI B
US
M
ASTERING
D
EVICES
........................................................................................... 4-4
T
ABLE
4–3. PCI D
EVICE
C
ONFIGURATION
A
CCESS
................................................................................ 4-6
T
ABLE
4–4. PCI F
UNCTION
C
ONFIGURATION
A
CCES
.............................................................................. 4-7
T
ABLE
4–5. PCI D
EVICE
I
DENTIFICATION
............................................................................................. 4-8
T
ABLE
4–6. PCI/ISA B
RIDGE
C
ONFIGURATION
R
EGISTERS
(82371, F
UNCTION
0).................................. 4-10
T
ABLE
4–7. PCI/AGP B
RIDGE
C
ONFIGURATION
R
EGISTERS
(82371, F
UNCTION
1).................................4-14
T
ABLE
4–8. AGP B
US
C
ONNECTOR
P
INOUT
......................................................................................... 4-15
T
ABLE
4–9. ISA E
XPANSION
C
ONNECTOR
P
INOUT
............................................................................... 4-17
T
ABLE
4–10. D
EFAULT
DMA C
HANNEL
A
SSIGNMENTS
....................................................................... 4-20
T
ABLE
4–11. DMA P
AGE
R
EGISTER
A
DDRESSES
................................................................................. 4-21
T
ABLE
4–12. DMA C
ONTROLLER
R
EGISTERS
...................................................................................... 4-22
T
ABLE
4–13. M
ASKABLE
I
NTERRUPT
P
RIORITIES AND
A
SSIGNMENTS
.................................................... 4-24
T
ABLE
4–14. M
ASKABLE
I
NTERRUPT
C
ONTROL
R
EGISTERS
.................................................................. 4-24
T
ABLE
4–15. I
NTERVAL
T
IMER
F
UNCTIONS
......................................................................................... 4-27
T
ABLE
4–16. I
NTERVAL
T
IMER
C
ONTROL
R
EGISTERS
........................................................................... 4-27
T
ABLE
4–17. C
LOCK
G
ENERATION AND
D
ISTRIBUTION
........................................................................ 4-28
T
ABLE
4–18. C
ONFIGURATION
M
EMORY
(CMOS) M
AP
....................................................................... 4-30
T
ABLE
4–19. S
YSTEM
I/O M
AP
........................................................................................................... 4-46
T
ABLE
4–20. 82371 S
OUTH
B
RIDGE
G
ENERAL
P
URPOSE
I
NPUT
P
ORT
U
TILIZATION
............................... 4-47
T
ABLE
4–21. 82371 S
OUTH
B
RIDGE
G
ENERAL
P
URPOSE
O
UTPUT
P
ORT
U
TILIZATION
............................ 4-48
T
ABLE
4–22. 87309 I/O C
ONTROLLER
P
N
P S
TANDARD
C
ONFIGURATION
R
EGISTERS
.............................. 4-49
T
ABLE
5–1. IDE PCI C
ONFIGURATION
R
EGISTERS
................................................................................ 5-2