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ConMed hyfrecator 2000 - Gate Waveform Problems

ConMed hyfrecator 2000
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2000
39
If the +5 voltage is incorrect, +12V or +24U may be low or noisy, or the 5V regulator may be faulty;
separate +5V regulators are used for each microcontroller. If +5V power exceeds +6.5V, the corresponding
regulator has probably failed, and the microcontroller very likely has been permanently damaged. Correct the
+5V problem before installing a new microcontroller.
If over 100 mV of noise is detected, a bypass capacitor on either the 5V regulator input or output may be
open. VR1 (+5M) is current-limited at 100 mA, and a ground short on any of the U2 Monitor
microcontroller output pins may easily draw greater than this. If noise on +5M appears “squarish” and is
not synchronous to the mains frequency, check U2 output signals for the ability to swing to greater than
+4V. If 25-30 kHz noise appears on +5M only during activation, Q4 may be shorted.
The +5C regulator VR2 is current-limited at over 1000 mA, so noise appearing on that signal is unlikely to
be caused by output line shorts on U1; such a short is more likely to permanently damage U2. VR2 relies
on the A1 PWB as a heatsink. When replacing VR2, first tighten the bolt clamping the tab to the PWB,
then solder the leads; this ensures that mechanical stress is not transferred to the VR2 I.C. die bonds.
The two EEPROMs are also powered by +5V, but high Vcc current faults in those devices are more likely to
yield EEPROM Fault Codes on power-up than to produce noise on +5V.
4.4.7.2 Gate Waveform Problems
The frequency and duty cycle of the gate waveform driving the RF PA FET are tested by the Monitor
microcontroller fully during POST and continuously during activation. So faults in either of these
parameters, including absence of gate drive, are most likely to generate a “-3” Fault Code during POST. If
POST detects /GATE activity during the first step, with GATENA low, it will also declare a "-7".
If POST declares a “-3” fault during one of the first three steps, it is possible that VGATE may have drifted
into the fault threshold or that the previous calibration was not done correctly. If so, then a simple
recalibration may be all that is necessary to restore service. See Section 4.2.6.
After POST, the Monitor microcontroller uses the presence of activity /GATEMON to detect activation, and
then verifies that against /ACTIV.M. Disagreement will yield a “-7” code.
Since gate drive problems are likely to force a Fault shutdown, effective troubleshooting can be done only in
Service Pseudo-Run mode. (Section 4.4.4)
Since the PA FET is operated in saturation, slight deviations in amplitude are not detected automatically, nor
are they likely to cause RF power to deviate measurably. However, if /GATE or GATE signals swing well
below specification, the Monitor microcontroller may declare a Fault, even if the frequency and duty cycle
are correct. Such faults are also likely to be associated with low output power.
Thus the first place to look when troubleshooting gate waveform faults is GATEMON on A2TP7, which
should appear as shown in Figure 5.4. If the amplitude of the signal is low or distorted, the problem is most
likely on the A2 PWB (Section 4.4.9). But first check /GATE on A2TP8, which should swing a full 5V; if
not, check /GATEPWM on A1U1-12 for full 5V swing. Low, or no amplitude on /GATE may be caused by
an input short on A2U1, open Q3, R14 or R15. Low amplitude on /GATEPWM is most likely due to a
faulty output on U1.
If the GATEMON amplitude appears correct, check the period and duty cycle in each of the 3 modes (See
3.3.4.1.7 for correct values); the power must be set above 0 to get a gate signal.

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