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Delta ECMA-E 1315 Series - Page 440

Delta ECMA-E 1315 Series
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ASDA-A2 Chapter 8 Parameters
Revision February, 2017 8-189
U: See table U below:
bit 15 14 13 12
U function - - - Trigger PR
Description - - - When this bit is set to
1, PR#45 will be
triggered after the last
compare is completed.
It is provided in V1.038
sub09 (or the later
version)
CBA: Output the pulse length; Unit: 1ms
bit 3 2 1 0
X function
After
finishing
comparing,
the counter
returns to 0.
When
finishing
comparing,
CAP is
activated.
Cycle mode CMP is
activated
Description
As soon as
the last data
is compared,
P5-57 is set
to 0.
It is invalid
when CAP is
activated.
Never end Starts to
compare
when this
bit is set to
1. It returns
to 0 when
finishing
comparing.
bit 0: When the value of P5-58 is more than 0, set bit to 1 will activate
CMP. When comparing one data, the value of P5-58 will minus 1.
When P5-58 is set to 0, the comparing is completed and returns
to 0. If P5-58 is 0, set bit 0 to 1 will not do any comparing and
return to 0 automatically. If bit 0 has already been set to 1, it is not
allowed to write 1 as the new value into the parameter. But it is ok
to write 0 to disable CMP.
bit 1: If this bit is 1, P5-58 will be reset after comparing the last data.
Then, start from the first data again. The cycle will never end and
bit 0 is always 1.
bit 2: If this bit is 1, CAP will be activated after comparing the last data.
(Set bit 0 of P5-39 to 1 and reset P5-38 to the previous value) If
CAP has already been activated, this function is invalid.
bit 3: If this bit is 1, set the counter (P5-57) to 0 after comparing the last
data. For example, if the comparing data is set to 3000 (one data
in total), the default value of the counter (P5-57) is 0. It is
expected to input 4000 pulse. When it reaches the 3000
th
pulse,
the CMP is completed and P5-57 returns to 0. When the pulse
reaches 4000, P5-57=1000. (No accumulative error)

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