70
AVR-5308CI / AVC-A1HD
M3087BFLBGP Terminal Function
Pin Pin Name Symbol I/O Type
Det
VCC Op(Ext.) Res STBY stop Function
1 P96/TXD4 (POA LINK TXD) O C
-
5V Ed Z O/L O/L (AVP-POA LINK comm. control pin for AVPA1HD)
2 P95/CLK4 GRNLED O C
-
5V Ed Z O/L O/L POWER/STANDBY LED control pin (ON : H)
3 P94/CTS4 TU/RDS CLK/(MPLD CLK) O C
-
5V - Z O/L O/L
PLL & RDS control pin (LC72131 & LC72720)/MAIN PLD
rewrite control pin
4 P93/CTS3
TU/RDS DIN O C
-
5V - Z O/L O/L PLL & RDS control pin (LC72131 & LC72720)
5 P92/TXD3 232C-2 TXD O C
-
5V Z O/L O/L 232C-2 control
6 P91/RXD3 232C-2 RXD O(I) -
-
5V - Z O/L O/L 232C-2 control
7 P90/CLK3 GUI REQ O C
-
5V - Z O/L O/L GUI control pin
8 P146/INT8
REMOTE DET I -
E↓&H
5V - Z O/L O/L ROOM TO ROOM Signal detect pin (Detected : H)
9 P145/INT7
(MOLD TDO) I -
E↓&H
5V Ed Z I I (MAIN PLD rewrite control pin)
10 P144/INT6
PROTECTION I-
E↓&L
5V Ed Z I I PROTECTION detect pin
11 P143 ZONE2 OSD_STB O C
-
5V - Z O/L O/L ZONE2 OSD control pin
12 P142 ZONE2 OSD_DATA O C
-
5V - Z O/L O/L ZONE2 OSD control pin
13 P141 ZONE2 OSD_CLK O C
-
5V - Z O/L O/L ZONE2 OSD control pin
14 P140 EEPROM DIN I -
-
5V - Z I O/L EEPROM control pin (M95128)
15 BYTE BYTE - -
-
- - - - - GND (Ext. data bus bit width switching, 16bit : L)
16 CNVss CNVSS I -
-
5V Ed Z I I
Single-chip / Micro-processor mode switching (Normal single-
chip : L,Rewrite boot program start : H input set)
17 P87/XCIN X2 VOLTAGE DET I -
E↓&L
5V Eu Z O/L O/L Voltage detection control pin
18 P86/XCOUT REDLED O C
-
5V Ed Z O/L O/L POWER/STANDBY LED control pin (ON : H)
19 RESET
RESET I-
Lv
5V Eu L I I Reset input (reset : L)
20 XOUT X2 O -
-
5V - - O/L O/L Clock output
21 VSS VSS - -
-
5V - - - - GND
22 XIN X1 I -
-
5V - - I I Clock input
23 VCC VCC1 - -
-
5V - - - - +5V
24 P85/NMI
_NMI I-
-
5V - - - - Not used (Fixed to H)
25 P84/INT2
B.DOWN I-
E↓&L
5V Eu Z I I Power down detect (Power down : L)
26 P83/INT1
POWER KEY I-
E↓&L
5V Eu I I Interrupt port for WAIT mode cancel
27 P82/INT0
REMOCON I -
E↑&L
5V Ed Z I I Remote control signal input
28 P81 MPLD WRITE I/O -
-
5V Eu Z I I Normal:input port "Z",MAIN CPU PLD rewrite:output "L"
29 P80/RXD5 iPod RXD MIIO I -
-
5V - Z I O/L IPOD comm. control pin
30 P77/CLK5 RDS DATAOUT I -
E↓&L
5V Eu - O/L O/L RDS data input (LC72720)
31 P76/TXD5 iPod TXD MOII O C
-
5V - Z O/L O/L IPOD comm. control pin
32 P75/(ISRXD1(UART)) TU STB/(MPLD MS) O C
-
5V - Z O/L O/L
TUNER PLL control pin (LC72131)/MAIN PLD rewrite control
pin
33 P74/(ISCLK1) TU DOUT/(MPLDTDI_M) I -
Lv
5V Ed - O/L O/L
TUNER PLL control pin (LC72131)/MAIN PLD rewrite control
pin
34 P73/(ISTXD1(UART)) EEPROM CS O C
-
5V - Z O/L O/L EEPROM control pin (M95128)
35 P72/CLK2 GUI CLK O C
-
5V - Z O/L O/L GUI control pin
36 P71/RXD2 GUI RX I -
-
5V - Z I O/L GUI control pin
37 P70/TXD2 GUI TX O N
-
5V Eu Z O/L O/L GUI control pin
38 P67/TXD1 TXD MO232I O C
-
5V - Z O/L O/L Data transfer output to outside (AMX)
39 VCC VCC - -
-
5V - - - - +5V
40 P66/RXD1 RXD MI232O I -
-
5V Ed Z I O/L Data receive input from outside (AMX)
41 VSS VSS - -
-
-----GND
42 P65/CLK1(SCLK) SCLK O C
-
5V Ed Z O/L O/L For emulator
43 P64/CTS1
(BUSY) BUSY O C
-
5V Ed Z O/L O/L For emulator
44 P63/TXD0 E_RXDMOEI O C
-
5V - Z O/L O/L ETHERNET comm. control pin
45 P62/RXD0 E_TXDMIEO I -
-
5V - Z I O/L ETHERNET comm. control pin
46 P61/CLK0 EEPROM CLK O C
-
5V - Z O/L O/L EEPROM control pin (M95128)
47 P60/CTS0
EEPROM DOUT O C
-
5V - Z O/L O/L EEPROM control pin (M95128)
48 P137 GUI ACK I -
E↓&L
3V - Z O/L O/L GUI control pin
49 P136/ISCLK2(SPI) CLKMO O C
-
3V - Z O/L O/L
MAIN-SUB
μ
com comm. control pin
50 P135/ISRXD2(SPI) SOMI I -
-
3V - Z I O/L
MAIN-SUB
μ
com comm. control pin
51 P134/ISTXD2(SPI) MOSI O C
-
3V Z O/L O/L
MAIN-SUB
μ
com comm. control pin
52 P57/RDY
RDY I-
Lv
3V Eu Z O/L O/L External memory access pin
53 P56/ALE ALE O C
-
3V Z O/L O/L External memory access pin
54 P55/HOLD
/EPM HOLD/FLASH EPM I-
Lv
3V Eu Z O/L O/L
External memory access pin/Rewrite boot program start : L
input set
55 P54/HLDA
HLDA OC
Lv
3V Eu Z O/L O/L External memory access pin
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