Denon DCD-720AE - Page 82

82
Pin
No.
Symbol I/O Description
Default Remarks
61
VDD3 - Power Supply pin for 3.3V Digital circuit -
62
BUS0
I/O
3I/F
Microprocessor I/F data input/output pin 0 I
CMOS Port
Schmitt input
Refer to [1.2 Pin Assinment Table]
63
BUS1
I/O
3I/F
Microprocessor I/F data input/output pin 1 I
CMOS Port
Schmitt input
Refer to [1.2 Pin Assinment Table]
64
BUS2
I/O
3I/F
Microprocessor I/F data input/output pin 2 I
CMOS Port
Schmitt input
Refer to [1.2 Pin Assinment Table]
65
BUS3
I/O
3I/F
Microprocessor I/F data input/output pin 3 I
CMOS Port
Schmitt input
Refer to [1.2 Pin Assinment Table]
66
BUCK
I
3I/F
Microprocessor I/F BUS clock Input pin I
Schmitt input
Refer to [1.2 Pin Assinment Table]
67
/CCE
I
3I/F
Microprocessor I/F chip enable input pin I
Schmitt input
Refer to [1.2 Pin Assinment Table]
68
MS
I
3I/F
Microprocessor I/F mode selection pin.
“H”: Parallel I/F, “L”: Serial I/F
I
Refer to [1.2 Pin Assinment Table]
69
/RST
I
3I/F
Reset Input pin I
Schmitt input
70
Test
I
3I/F
Test pin 䋨”L” fixed䋩 I
Connect to GND for normal operation
71
VDD1-1 - Power Supply pin for 1.5V Digital circuit -
72
VSS-1 - Grounding pin for 1.5V Digital circuit -
73
/SRAMSTB
I
3I/F
1Mbit SRAM stand by pin䋨/SRAMSTB="L"䋩 I
74
VDDM1 - Power Supply for 1.5V 1Mbit SRAM circuit -
75
PDo
O
3AI/F
㪜㪝㪤㩷㪸㫅㪻㩷㪧㪣㪚㪢㩷㪧㪿㪸㫊㪼㩷㪻㫀㪽㪽㪼㫉㪼㫅㪺㪼㩷㫊㫀㪾㫅㪸㫃㩷㫆㫌㫋㫇㫌㫋㩷㫇㫀㫅㪅O
4-state output ( RVDD3,
RVSS3,PVREF, Hiz)
76
TMAX
O
3AI/F
㪫㪤㪘㪯㩷㪻㪼㫋㪼㪺㫋㫀㫆㫅㩷㫉㪼㫊㫌㫃㫋㩷㫆㫌㫋㫇㫌㫋㩷㫇㫀㫅 O
3-state output ( RVDD3, RVSS3, Hiz)
77
LPFN
I
3AI/F
㪧㪣㪣㩷㪺㫀㫉㪺㫌㫀㫋㩷㪣㪧㪝㩷㪸㫄㫇㫃㫀㪽㫀㪼㫉㩷㫀㫅㫍㪼㫉㫊㫀㫆㫅㩷㫀㫅㫇㫌㫋㩷㫇㫀㫅 I
78
LPFo
O
3AI/F
㪧㪣㪣㩷㪺㫀㫉㪺㫌㫀㫋㩷㪣㪧㪝㩷㪸㫄㫇㫃㫀㪽㫀㪼㫉㩷㪦㫌㫋㫇㫌㫋㩷㫇㫀㫅 O
79
PVREF - 㪧㪣㪣㩷㪺㫀㫉㪺㫌㫀㫋㩷㪈㪅㪍㪌㩷㪭㩷㫉㪼㪽㪼㫉㪼㫅㪺㪼㩷㫍㫆㫃㫋㪸㪾㪼㩷㫇㫀㫅㪅 -
Connected to VRO. Connect to
GND by 0.1uF and 100uF.
80
VCoF
O
3AI/F
㪭㪚㪦㩷㪽㫀㫃㫋㪼㫉㩷㫇㫀㫅 O
Connect to GND by 0.01uF
3A I/F : 3 V analog circuit input/output pin.
1.5 I/F : 1.5Vdigital input/output pin.
3 I/F : 3 V digital input/output pin.