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Denon DRA-F107 - Page 35

Denon DRA-F107
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35
DRA-F107 / DRA-F107DAB
Electrical Characteristics
4.3.2 PWM Section
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Regulation Pull-Up Resistor R
REG
14 23 33 k:
PWM-OP Gain A
V
3.18 3.3 - -
Offset for Voltage Ramp V
OS
0.63 0.7 - V
Soft-Start time t
SOFTS
18 21 38 ms
Zero crossing threshold voltage V
ZCT1
20 50 110 mV
Ringing suppression threshold V
ZCT2
0.7 V
Minimum ringing suppression
time
t
ZCRST1
2.2 4.2 5.5 PsV
ZC
> V
ZCT2
Maximum ringing suppression
time
t
ZCRST2
-42-PsV
ZC
< V
ZCT2
Threshold to set Up/Down
Counter to one
V
RM
3.9 V
Threshold for downward
counting
V
RH
3.2 V
Threshold for upward counting V
RL
2.5 V
Counter time
1)
t
COUNT
48 ms
Maximum restart time in normal
operation
t
sMax
33 42 60 PsV
ZC
<V
ZCT1
Leading Edge Blanking t
LEB
200 330 460 ns
Peak current limitation in normal
operation
V
csth
0.95 1.0 1.05 V
Regulation voltage for entering
Burst Mode
V
EB
1.1 V
Regulation voltage for leaving
Burst Mode
V
LB
4.5 V
Regulation voltage for burst-on V
BH
3.6 V
Regulation voltage for burst-off V
BL
3.0 V
Fixed Switching Frequency in
Burst Mode
f
sB
64 80 96 kHz
Max. Duty Cycle in Burst Mode D
maxB
0.5
Peak Current Limitation in Burst
Mode
V
csB
0.22 0.25 0.3 V
1) The parameter is not subject to production test - verified by design/characterization

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