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Denon DRA-F107 - Page 36

Denon DRA-F107
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36
DRA-F107 / DRA-F107DAB
Electrical Characteristics
4.3.3 Protection
Note: The trend of all the voltage levels in the Control Unit is the same regarding the deviation except V
VCCOVP
4.3.4 Gate Driver
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
VCC overvoltage threshold V
VCCOVP
24 25.0 26 V
VCC undervoltage threshold V
VCCUVP
10.3 11.0 11.7 V
Over Load or Open Loop
Detection threshold for OLP
protection at REG pin
V
OLP
4.5 V
Over Load or Open Loop
Protection Blanking Time
T
OLP-B
16 24 35 ms
Output Overvoltage detection
threshold at the ZC pin
V
OPOVP
4.5 V
Threshold for short winding
protection
V
csSW
1.68 V
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Output voltage at logic low V
GATElow
0.7 V I
OUT
= 20mA
Output voltage at logic high V
GATEhigh
10.0 V I
OUT
= -20mA
Output voltage active shut down V
GATEasd
1.0 V
V
V
VCC
= 7V
I
OUT
= 20mA
Rise Time t
rise
-100-nsC
OUT
= 4.7nF
Fall Time t
fall
-25-nsC
OUT
= 4.7nF

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