1. IC's
SEMICONDUCTORS
R5F5634BCDFB (DIGITAL : IC301)
Terminal Functions
Pin Pin Name Signal Name Signal function I/O Pu/Pd STBY
1 AVSS AVSS AVSS
- - -
2 P05/DA1 (DAC Output)
AO
3 VREFH VREFH DAC VCC
- - -
4 P03/DA0 BDOWN AC cut off DET (INT)
AO
5 VREFL VREFL DACGND
- - -
6 P02/IRQ10 CEC_IN Regacy CEC input
I I
7 P01/PMC1 REMOTE Wired IR Remote Receiver
I I
8 P00/PMC0 IRSIG1_MCU IR Remote Receiver
I I
9 PF5/IRQ4 IRSIG2_MCU IR Remote Receiver
I I
10 EMLE EMLE JTAG Emurator Enable
I 10KPD I
11 PJ5 NET_PW Network standby power switch
O L
12 VSS
- - -
13 PJ3/RTS0# FRONT_BLUE_LED FRONT BLUE LED Drive (Need DIMMER control PWM)
O O
14 VCL VCL 0.1 μ F capacitor to VSS
- - -
15 PJ1 CEC_OUT Regacy CEC output
O O
16 MD/FINED MD/FINED MODE to JTAG
I I
17 PJ2 HDMI_PW HDMI_Power supply switch
O O
18 PJ4 DSP_PW DSP_Power supply switch
O L
19 RES# MCU_RESET Reset
I 4.7KPU I
20 XTAL XTAL Crystal
O - O
21 VSS
- - -
22 EXTAL EXTAL Crystal
I - I
23 VCC
- - -
24 P35/NMI (NA)
I 4.7KPU I
25 TRST# TRST# JTAG Emurator TRST
I 4.7KPD I
26 P33/RXD0 USBCNVRxD UART for MCP2200/FT232R
I I
27 P32/TXD0 USBCNVTxD UART for MCP2200/FT232R
O O
28 TMS TMS JTAG Emurator TMS
I 4.7KPU I
29 TDI TDI JTAG Emurator TDI
I 4.7KPU I
30 FINEC/TCK FINEC/TCK JTAG Emurator TCK
I 4.7KPU I
31 TDO TDO JTAG Emurator TDO
O 4.7KPU O
32 P25 BD3473_CL CL for BD3473KS2
O O
33 P24/SCK3 DSPARESET DSPA reset
O L
34 P23/CTS0# BD3473_DATA DATA for BD3473KS2
O O
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
PE0
P64
P63
P62
P61
PK3
P60
PK2
PD7
PD6
PD5
PD4
PD2
PD1
PD0
P93
P92
P91
VSS
P90
VCC
P47
P46
P45
P44
P43
P42
P41
VREFL0
P40
VREFH0
P07
PE1
PD3
AVCC0
P74
PC2
P76
P77
PC3
PC4
P80
P81
P82
PC5
PC6
PC7
VCC
VSS
P50
P51
P52
P53
P54
P55
P56
PH0
PH1
PH2
PH3
P12
P13
P14
P15
P86
P16
P87
P20
P75
P83
P17
PE2
RX634 Group
PLQP0144KA-A
(144-pin LQFP)
(Top view)
Note: This figure indicates the power supply pins and I/O port pins. For the pin configuration, see the table
“List of Pi ns and Pin Functions (144- Pin LQFP) ”.
Note 1. The P73 pin is av ailable only in 5-V packages. It is not a vailable in 3 -V packag es.
Note 2. The PL5 pin is av ailable only in 3-V packages. It is not a vailable in 5 -V packag es.
35 P22/SCK0 CEC_PW CEC Power supply switch
O O
36 P21/SCL1 I2C3_SCL I2C-I/F for PCM9211, BMA250
I/O 4.7KPU I
37 P20/SDA1 I2C3_SDA I2C-I/F for PCM9211, BMA250
I/O 4.7KPU I
38 P17/TXD3 VOL+ Master Volume rotation DET VOL+
I I
39 P87 NOM_PW NORMAL Power
O L
40 P16/RXD3 VOL- Master Volume rotation DET VOL-
I I
41 P86 OBUF_ZSTBY Set PLD into Stand-by
O O
42 P15/TCLKB DETON_COAX AUTO ON COAX
I I
43 P14/TCLKA DETON_OPT AUTO ON OPT
I I
44 SDA0 HSDA0 I2C-I/F for HDMI(NM864788A)
I/O 10KPU I
45 SCL0 HSCL0 I2C-I/F for HDMI(NM864788A)
I/O 10KPU I
46 PH3 RX3_DET HDMI IN 5V detect
I I
47 PH2 RX2_DET HDMI IN 5V detect
I I
48 PH1 RX1_DET HDMI IN 5V detect
I I
49 PH0/CACREF RX0_DET HDMI IN 5V detect
I I
50 P56 OR_SDAC_INSEL2 OR_SDAC_INSEL2(PLD)
O O
51 P55 OR_SDAC_INSEL1 OR_SDAC_INSEL1(PLD)
O O
52 P54/RTS2# OR_SDAC_INSEL0 OR_SDAC_INSEL0(PLD)
O O
53 P53 PLD-SPILT PLD Mute serial control
O (PU) O
54 P52/RXD2 PLD-SPICLK PLD Mute serial control
O O
55 P51/SCK2 PLD-SPIDATA PLD Mute serial control
O O
56 P50/TXD2 CMWAKEUP Core Module Wake-up
O 4.7KPD L
57 VSS
- - -
58 P83 MDAC_MUTE MUTE SDATA of Main DAC(PLD)
O H
59 VCC
- - -
60 PC7 UBOOTEN User Boot Mode Enable
I 4.7KPU I
61 PC6 HPD-MCU0 HDMI HPD assert
O O
62 PC5 HPD-MCU1 HDMI HPD assert
O O
63 P82 DIRRESET RESET DIR
O L
64 P81 PVDD_HL_SW D-AMP PVDD Higjh/Low SW
O L
65 P80
O L
66 PC4/SCK5 HPD-MCU2 HDMI HPD assert
O O
67 PC3/TXD5 HPD-MCU3 HDMI HPD assert
O O
68 P77/TXD11 PLD-TDI PLD-TDI
Z/O Z
69 P76/RXD11 PLD-TDO PLD-TDO
Z/O Z
70 PC2/RXD5 TX0_HPD Sens TX0 HPD
I I
71 P75/SCK11 PLD-TCK PLD-TCK
Z/O Z
72 P74 PLD-TMS PLD-TMS
Z/O Z
73 PC1/SDA3 CPU_EEPROM_SDA CPU_EEPROM_SDA
I I
74 PL1 DIST_MUTE DIST_MUTE
O L
75 PC0/SCL3 CPU_EEPROM_SCL CPU_EEPROM_SCL
I/O 10KPU I
76 PL0 STBY_STATUS STBY_STATUS
I I
77 PL5/CECIO CEC CEC-I/O
I/O Ext-PU I
78 PB7/TXD9 CM_RxD UART for LEGO
I I
79 PB6/RXD9 CM_TxD UART for LEGO
O L
80 PB5/SCK9 UARTSCKIN 7.5MHz(8x921.6k) UART Clock Input
I I
81 PB4/RTS9# CM_CTS UART for LEGO
O L
82 PB3 OR_DSPAI_SL2 OR_DSPA_INSEL2(PLD)
O O
83 PB2 OR_DSPAI_SL1 OR_DSPA_INSEL1(PLD)
O O
84 PB1 OR_DSPAI_SL0 OR_DSPA_INSEL0(PLD)
O O
85 P72 CLIP_OTW -> FAULT Shutdown signal from TPA3251D2
I 10KPU I
86 P71 DSPA_HOLD DSPA_HOLD
O L
87 PB0 DETON_COAX AUTO ON COAX
I I
Only major semiconductors are shown, general semiconductors etc. are omitted to list.
The semiconductor which described a detailed drawing in a schematic diagram are omitted to list.
32
Caution in
servicing
Electrical Mechanical Repair Information Updating
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