REV.-A
7.3 Sub-CPU
7508
This is a 4-bit, C-MOS
CPU
which
incorporates a masked ROM, timer, and serial interface, etc.
This
CPU
is always backed up
by
the battery, regardless
whether
power
is on
or
off,
it
provides the
following
control functions:
1.
Power
on/off
(POWER
switch
and an associated program)
2. Keyboard scanning and auto-repeat
3.
RESET
switch
4. Temperature and battery voltage sensing
5.
D-RAM refresh
6. Clock (calendar and alarm services)
The sub-CPU exchanges data
with
the main
CPU
in a bit-serial fashion via the gate array
GAH40M. Fig.
7-3
is a functional block diagram
of
the sub-CPU. Table
7-4
lists the terminal sig-
nals and summarizes their functions.
Xl
X2
COUNT
CLOCK
GENERATOR
Cl
CLOCK
CONTROL
PROGRAM MEMORY
2048
x 8 BITS
(7507)
4096
x 8 BITS (7508)
SYSTEM
CLOCK
GENERATOR
Cll
Cl2
STANDBY
CONTROL
INSTRUCTION
DECODER
I I I
VDD
vss
RESET
SCR/POl
INTl
INTO/POO
SO/P02
SI/P03
GENERAL REGISTERS
D(4)
H(4)
STACK POINTER (8)
DATA
MEMORY
12B x 4 BITS
(7507)
224
x 4 BITS
(7508)
Fig.
7-3
7-9
POO-P03
P10-P13
P20-P23
PSTR/P20
PTOUT/P21
P30-P33
P40-P43
P50-P53
P60-P63
P70-P73
To Next Page
Loading...
