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Epson PX-8 - Chapter 4 Input and Output Devices and Optional Additions to the PX-8; 4.1 Storage of Files and Data

Epson PX-8
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REV.-A
2.6
Reset
The reset signal initializes
the
computer
circuit
and is used
to
prevent any abnormal operation
at
power
on (during
the
logic
circuit
power
voltage rise time), after emergency
shut-down
due
to
any
computer
abnormality, and before subsequent restart. The resetting operation
of
this
com-
puter is accomplished indirectly
by
software. The sub-CPU internal program differs
from
other
computers,
which
are reset
directly
by
a
switch
operation.
Fig.
2-63
outlines
the
RESET
signal circuits.
System reset
signal
VB
SW2
SW5
~
SWr-~P~6~0~--'P~0~0~-----RS~~
(INTO)
o>--....:;>~
VB
INITIAL
Z80-related
Reset routine
(ADSNS)
I Internal
.....
Q)
c::
co·';:::;
o
~
LO
e
,-.....
...
Q)
<J)
Q)
RESETSW
Sub-CPU
IE---
7508
(2E)
Clears all registers
~_
a::
GAH40D
(6A)
~
-.£'
1:
AAA
RST
I
such
as
timer, etc.
ltr
Data I nes
o
to
7
RSO
L~
-
Z-80
RS
(4A)
-
6303
RS
(13D)
GAH40M
(4C)
CN8
7B~7
(Option unit i nterface)
-
82C51
P71
~---IOFF
GAH40M
~-----IOFF
GAH40D
'--------=;;.
CN
8
(Option unit interface)
Fig.
2-63
Reset
Signal
Circuit
Block
Diagram
2-63
Gate array
OFF
signal

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