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Epson PX-8 - Page 59

Epson PX-8
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REV.-A
Handshaking
between
the
l80
and
6303
is
performed
via
the
two
status
registers in
SED1320
which
are respectively assigned
to
the
CPUs. Each
of
the
registers has
Input
Buffer Full (IBF),
Out-
put
Buffer Full (IBF). and Flag
(FI)
bits
as
shown
in Fig.
2-31.
Data
outputs
(write) and
inputs
(read)
are
controlled
by
the
state
of
these
status
bits. The handshaking
between
the
two
CPUs is ex-
plained below.
zao
SED
1320
6303
x X
:>
Status
registers
F1
fE-
~
F1
-------
-------
OOOEH:
Read
OOOEH
.
OOOFH:
Wnte
~
--------
1---------
S
R
IBF
-
-
-
-
---
IBF
R
-
---:--<:--
S
---------
1---------
S
-
--
-
-
-
-
-
R
OBF
--
OBF
cf!-Q
Fig. 2-31
Handshaking
Between
zao
and
6303
The
status
registers are accessed
from
both
l80
and are
6303
and used as
follows:
Output
When
either
the
l80
or
6303
outputs
1-byte
data,
the
OBF
bit
of
one
status
register and
the
IBF
bit
of
the
other
status register are set. This
informs
the
other
CPU
that
the
1-byte
data has been
stored in
the
gate array
SED1320,
ready
to
be read.
Input
When
the
CPU reads
the
data
from
SED1320,
the
IBF
bit
of
its
status
register and
the
OBF
bit
of
the
other
register are reset
after
the
data is read in. These
input
and
output
operations
are
asynchronous.
2-35

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