FLIR LEPTON® Engineering Datasheet 
 
The information contained herein does not contain technology as defined by the EAR, 15 CFR 772, is publicly available, 
and therefore, not subject to EAR.  NSR (6/14/2018). 
Information on this page is subject to change without notice. 
Lepton Engineering Datasheet, Document Number: 500-0659-00-09 Rev: 203
 
76 
9.2  DC and Logic Level Specifications 
Table 16 - DC and Logic Levels 
Core Voltage (primary power for 
the
 
Lepton internal ASIC) 
VDDC, peak-to-peak ripple voltage 
Sensor Voltage (primary power 
for
 
the Lepton internal sensor 
chip) 
VDD, peak-to-peak ripple voltage 
I/O Voltage (primary power for 
the
 
Lepton I/O ring) 
VDDIO, peak-to-peak ripple 
voltage 
Supply current for core (VDDC) 
Supply current for sensor (VDD) 
Supply current for I/O ring 
and
 
shutter assembly (VDDIO) 
Note(s) 
1.  Maximum measured at 65 degrees C 
2.  Maximum at -10 degrees C 
3.  FLIR recommends utilizing two separate power supplies rather than a common supply for VDD and VDDIO due to noise 
considerations.