Remote Operation
Instrument Status Reporting IEEE 488.2 Basics 5
5-15
originate an RQS. It contains a user modifiable image of the Status Byte, whereby each true
bit acts to enable its corresponding bit in the Status Byte.
The common program command:*SRE phs Nrf performs the selection, where Nrf is a
decimal numeric, whose binary decode is the required bit pattern in the enabling byte.
For example:
If an RQS is required only when a Standard-defined event occurs and when a message is
available in the output queue, then Nrf should be set to 48. The binary decode is 00110000
so bit 4 or bit 5, when true , will generate an RQS; but with this decode, even if bit 3 is true ,
no RQS will result. The instrument always sets false the Status Byte bits 0, 1 and 2, so they
can never originate an RQS whether enabled or not.
5-35. Reading the Service Request Enable Register
The common query: *SRE? reads the binary number in the SRE register. The response is in
the form of a decimal number, which is the sum of the binary-weighted values in the
register. The binary weighted values of bits 0, 1 and 2 will always be zero.
5-36. IEEE 488.2 defined Event Status Register
The Event Status Register holds the Event Status Byte, consisting of event bits, each of
which directs attention to particular information. All bits are “sticky”, i.e. once true, cannot
return to false until the register is cleared. This occurs automatically when it is read by the
query*ESR?. The common command *CLS clears the Event Status Register and associated
error queue, but not the Event Status Enable Register.
Note that because the bits are “sticky”, it is necessary to read the appropriate subordinate
register of the status structure in order to clear its bits and allow a new event from the same
source to be reported.
The Event Status Register bits are named in mnemonic form as follows:
• Bit 0 Operation Complete (OPC).
This bit is true only if *OPC has been programmed and all selected pending operations
are complete. As the instrument operates in serial mode, its usefulness is limited to
registering the completion of long operations, such as self test.
• Bit 1 Request Control (RQC).
This bit is not used in the instrument. It is always set false.
• Bit 2 Query Error (QYE).
QYE true indicates that the application program is following an inappropriate message
exchange protocol, resulting in the following situations:
• Interrupted Condition. When the instrument has not finished outputting its
Response Message to a Program Query, and is interrupted by a new Program
Message.
• Unterminated Condition. When the application program attempts to read a
Response Message from the instrument without having first sent the complete
Query Message (including the Program Message Terminator) to the instrument.
• Deadlocked Condition. When the input and output buffers are filled, with the
parser and the execution control blocked.
• Bit 3 Device Dependent Error (DDE).
DDE is set true when an internal operating fault is detected, and the appropriate error
message is added to the Error Queue. See the “Note about the Error Queue” below:
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