Preliminary
29(45)
Prepared Document Number
Manfred Ortmann
Approved Checked Date Revision Storage
2009-10-05 PA 4.2 Mycable01
Pin Signal Function
91
JADE_IO_G2_1 VINHSYNC0 / GI1_4 / MLB_SIG / MLB_SIG
/ MLB_SIG
92 JADE_IO_G2_3 CCLK1
93
JADE_IO_G2_2 VINFID0 / GI1_3 / MLB_CL / MLB_CLK /
MLB_CLK
94
JADE_IO_G2_12 VIN1_2 / RI1_2 / CAN_RX1 / CAN_RX1 /
CAN_RX1
95
JADE_IO_G2_0 VINVSYNC0 / GI1_5 / MLB_DATA /
MLB_DATA / MLB_DATA
96 MPX_MODE_5_0 MPX_MODE_5_0
97 JTAG0 RTCK
98 MPX_MODE_5_1 MPX_MODE_5_1
99 JTAG2 TCK
100 USB_MODE USB_MODE
101 JTAG4 TMS
102 JTAGSEL JTAGSEL
103 JTAG6 TDO
104 JTAG1 XSRST
105 JADE_IO_G5_0 TRACECLK / UART_SIN3 / UART_SIN3
106 JTAG3 XTRST
107 JADE_IO_G5_2 TRACEDATA_3 / UART_SIN4 / UART_SIN4
108 JTAG5 TDI
109 JADE_IO_G5_4 TRACEDATA_1 / UART_SIN5 / PWMO1
110
VCC_CORE_PG VCC_CORE_PG Pin 11 LTC3417 U200
Power good VCC12 and VCC18
111 JADE_IO_G5_1 TRACECTL / UART_SOUT3 / UART_SOUT3
112
MR# /MR Pin 3 ADM6320 U201Manual Master
Reset
113
JADE_IO_G5_3 TRACEDATA_2 / UART_SOUT4 /
UART_SOUT4
114
RESET# /RESET Pin 1 ADM6320 U201
Reset Output
115 JADE_IO_G5_5 TRACEDATA_0 / UART_SOUT5 / PWMO0
116 WDI WDI Pin 4 ADM6320 U201 Watchdog
117 GND Ground
118
VCC18 1.8 V, regulated on XXSvideo for DDR2
SDRAM
119 GND Ground
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