Hitachi DK23DA-20F - Power on and Hardware Reset Timing

K6602705
Rev.3
08.20.01
- 109 -
6.4.3 Power On and Hardware Reset Timing
Figure 6-18 Power On and Hardware Reset Timing
SYMBOL Description MIN MAX Units
t
M
RESET- Pulse Width 25
m
s
t
N0
DRV 0 RESET negation to BSY bit set to one,
release PDIAD_
400 ns
t
P0
DRV 0 release DASP-- 1 ms
t
R0
DRV 0 sample of DASP- 1 450 ms
t
S
DRV 0 sample of PDIAG- 1ms 31s -
t
R1
DRV 1 assert DASP- 400 ms
t
N1
DRV 1 negate PDIAG- if asserted 1 ms
t
Q
DRV 1 assert PDIAG- 30 sec
t
M
t
N0
RESET-
BSY bit
DRV 0
t
P0
t
R0
DASP-
DRDY
PDIAG-
t
Q
DRV 1
BSY bit
t
R1
t
S
DASP-
PDIAG-
DRDY
t
N1
DASP-
(
out
)
(in)
(out)
(
out
)
(out)
(device 0)
(
device 1
)