Holtek BS82B12A-3 - UART T�Ansmitte

Rev. 1.20 126 January 23, 2015 Rev. 1.20 127 January 23, 2015
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
UART Transmitter
Datawordlengthsofeither8or9bitscanbeselectedbyprogrammingtheBNObitintheUCR1
register.WhenBNObitisset,thewordlengthwillbesetto9bits.Inthiscasethe9thbit,which
istheMSB,needstobestoredintheTX8bitintheUCR1register.Atthetransmittercoreliesthe
TransmitterShiftRegister,morecommonlyknownastheTSR,whosedataisobtainedfromthe
transmitdataregister,whichisknownastheTXRregister.Thedatatobetransmittedisloaded
intothisTXRregisterbytheapplicationprogram.TheTSRregisterisnotwrittentowithnewdata
untilthestopbitfromtheprevioustransmissionhasbeensentout.Assoonasthisstopbithasbeen
transmitted,theTSRcanthenbeloadedwithnewdatafromtheTXRregister,ifitisavailable.It
shouldbenotedthattheTSRregister,unlikemanyotherregisters,isnotdirectlymappedintothe
DataMemoryareaandassuchisnotavailabletotheapplicationprogramfordirectread/write
operations.AnactualtransmissionofdatawillnormallybeenabledwhentheTXENbitisset,but
thedatawillnotbetransmitteduntiltheTXRregisterhasbeenloadedwithdataandthebaudrate
generatorhasdenedashiftclocksource.However,thetransmissioncanalsobeinitiatedbyrst
loadingdataintotheTXRregister,afterwhichtheTXENbitcanbeset.Whenatransmissionof
databegins,theTSRisnormallyempty,inwhichcaseatransfertotheTXRregisterwillresultin
animmediatetransfertotheTSR.IfduringatransmissiontheTXENbitiscleared,thetransmission
willimmediatelyceaseandthetransmitterwillbereset.TheTXoutputpinwillthenreturntotheI/
Oorotherpin-sharedfunction.
Transmitting Data
WhentheUARTistransmittingdata,thedataisshiftedontheTXpinfromtheshiftregister,with
theleastsignificantbitfirst.Inthetransmitmode,theTXRregisterformsabufferbetweenthe
internalbusandthetransmittershiftregister.Itshouldbenotedthatif9-bitdataformathasbeen
selected,thentheMSBwillbetakenfromtheTX8bitintheUCR1register.Thestepstoinitiatea
datatransfercanbesummarizedasfollows:
• MakethecorrectselectionoftheBNO,PRT,PRENandSTOPSbitstodenetherequiredword
length,paritytypeandnumberofstopbits.
• SetuptheBRGregistertoselectthedesiredbaudrate.
• SettheTXENbittoensurethattheUARTtransmitterisenabledandtheTXpinisusedasa
UARTtransmitterpin.
• AccesstheUSRregisterandwritethedatathatistobetransmittedintotheTXRregister.Note
thatthisstepwillcleartheTXIFbit.
Thissequenceofeventscannowberepeatedtosendadditionaldata.Itshouldbenotedthatwhen
TXIFis"0",datawillbeinhibitedfrombeingwrittentotheTXRregister.ClearingtheTXIFagis
alwaysachievedusingthefollowingsoftwaresequence:
• AUSRregisteraccess
• ATXRregisterwriteexecution
Theread-onlyTXIFagissetbytheUARThardwareandifsetindicatesthattheTXRregisteris
emptyandthatotherdatacannowbewrittenintotheTXRregisterwithoutoverwritingtheprevious
data.IftheTEIEbitissetthentheTXIFagwillgenerateaninterrupt.Duringadatatransmission,
awriteinstructiontotheTXRregisterwillplacethedataintotheTXRregister,whichwillbe
copiedtotheshiftregisterattheendofthepresenttransmission.Whenthereisnodatatransmission
inprogress,awriteinstructiontotheTXRregisterwillplacethedatadirectlyintotheshiftregister,
resultinginthecommencementofdatatransmission,andtheTXIFbitbeingimmediatelyset.When
aframetransmissioniscomplete,whichhappensafterstopbitsaresentorafterthebreakframe,the
TIDLEbitwillbeset.TocleartheTIDLEbitthefollowingsoftwaresequenceisused:
• AUSRregisteraccess
• ATXRregisterwriteexecution
NotethatboththeTXIFandTIDLEbitsareclearedbythesamesoftwaresequence.