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Holtek BS82B12A-3 - Watchdog Timer

Holtek BS82B12A-3
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Rev. 1.20 56 January 23, 2015 Rev. 1.20 57 January 23, 2015
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
Watchdog Timer
TheWatchdogTimerisprovidedtopreventprogrammalfunctionsorsequencesfromjumpingto
unknownlocations,duetocertainuncontrollableexternaleventssuchaselectricalnoise.
Watchdog Timer Clock Source
TheWatchdogTimerclocksourceisprovidedbytheinternalf
SUB
clock,dependingonthedevices,
thef
SUB
clockisinturnsuppliedbytheLIRCoscillatororeithertheLXTorLIRCoscillatorselected
byacongurationoption.TheLIRCinternaloscillatorhasanapproximatefrequencyof32kHzand
thisspeciedinternalclockperiodcanvarywithV
DD
,temperatureandprocessvariations.TheLXT
oscillatorissuppliedbyanexternal32.768kHzcrystal.TheWatchdogTimersourceclockisthen
subdividedbyaratioof2
8
to2
18
togivelongertimeouts,theactualvaluebeingchosenusingthe
WS2~WS0bitsintheWDTCregister.
Watchdog Timer Control Register
Asingleregister,WDTC,controlstherequiredtimeoutperiodaswellastheenableoperation.The
WDTCregisterisinitiatedto01010011BatanyresetexceptWDTtime-outhardwarewarmreset.
WDTC Register
Bit 7 6 5 4 3 2 1 0
Name WE4
WE3 WE2 WE1 WE0 WS2 WS1 WS0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
POR 0 1 0 1 0 0 1 1
Bit7~3 WE4 ~ WE0:WDTfunctionsoftwarecontrol
01010Bor10101B:Enabled
Othervalues:ResetMCU(Resetwillbeactiveafter2~3LIRCclockfordebouncetime.)
IftheMCUresetiscausedbytheWE[4:0]inWDTCsoftwarereset,theWRFagof
CTRLregisterwillbeset.
B
it2~0 WS2 ~ WS0:WDTTime-outperiodselection
000:2
8
/f
SUB
001:2
10
/f
SUB
010:2
12
/f
SUB
011:2
14
/f
SUB
100:2
15
/f
SUB
101:2
16
/f
SUB
110:2
17
/f
SUB
111:2
18
/f
SUB
Thesethreebitsdeterminethedivision ratio of theWatchdogTimersourceclock,
whichinturndeterminesthetimeoutperiod.

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