Rev. 1.20 24 January 23, 2015 Rev. 1.20 25 January 23, 2015
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
System Architecture
Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributed
totheirinternalsystemarchitecture.Therangeofdevicestakeadvantageoftheusualfeaturesfound
withinRISCmicrocontrollersprovidingincreasedspeedofoperationandPeriodicperformance.The
pipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstructionexecution
areoverlapped,henceinstructionsareeffectivelyexecutedinonecycle,withtheexceptionofbranch
orcallinstructions.An8-bitwideALUisusedinpracticallyallinstructionsetoperations,which
carriesoutarithmeticoperations,logicoperations,rotation,increment,decrement,branchdecisions,
etc.TheinternaldatapathissimplifiedbymovingdatathroughtheAccumulatorandtheALU.
CertaininternalregistersareimplementedintheDataMemoryandcanbedirectlyorindirectly
addressed.Thesimpleaddressingmethodsoftheseregistersalongwithadditionalarchitectural
featuresensurethataminimumofexternalcomponentsisrequiredtoprovideafunctionalI/O
controlsystemwithmaximumreliabilityandexibility.Thismakesthesedevicessuitableforlow-
cost,high-volumeproductionforcontrollerapplications.
Clocking and Pipelining
Themainsystemclock,derivedfromeitheraLXT,HIRCorLIRCoscillatorissubdividedintofour
internallygeneratednon-overlappingclocks,T1~T4.TheProgramCounterisincrementedatthe
beginningoftheT1clockduringwhichtimeanewinstructionisfetched.TheremainingT2~T4
clockscarryoutthedecodingandexecutionfunctions.Inthisway,oneT1~T4clockcycleforms
oneinstructioncycle.Althoughthefetchingandexecutionofinstructionstakesplaceinconsecutive
instructioncycles,thepipeliningstructureofthemicrocontrollerensuresthatinstructionsare
effectivelyexecutedinoneinstructioncycle.Theexceptiontothisareinstructionswherethe
contentsoftheProgramCounterarechanged,suchassubroutinecallsorjumps,inwhichcasethe
instructionwilltakeonemoreinstructioncycletoexecute.
System Clock and Pipelining
Forinstructionsinvolvingbranches,suchasjumporcallinstructions,twomachinecyclesare
requiredtocompleteinstructionexecution.Anextracycleisrequiredastheprogramtakesone
cycletorstobtaintheactualjumporcalladdressandthenanothercycletoactuallyexecutethe
branch.Therequirementforthisextracycleshouldbetakenintoaccountbyprogrammersintiming
sensitiveapplications.