Holtek BS82B12A-3 - TM Inte; EEPROM Inte

Rev. 1.20 138 January 23, 2015 Rev. 1.20 139 January 23, 2015
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
Bit3 TB0ON:TimeBase0enable/disablecontrol
0:Disable
1:Enable
Bit2~0 TB02 ~ TB00:SelectTimeBase1Time-outPeriod
000:2
8
/f
PSC
001:2
9
/f
PSC
010:2
10
/f
PSC
011:2
11
/f
PSC
100:2
12
/f
PSC
101:2
13
/f
PSC
110:2
14
/f
PSC
111:2
15
/f
PSC
f
SYS
/4
CLKSELn[1:0]
f
SUB
f
SYS
Prescaler
TBnON
f
PSC
TBn[2:0]
TimeBasenInterrupt
f
H
Time Base Structure (n=0 or 1)
TM Interrupts
TheCompactandPeriodictypeTMseachhastwointernalinterrupts,theinternalcomparatorAor
comparatorP,whichgeneratesaTMinterruptwhenacomparematchconditionoccurs.Foreach
oftheCompactandPeriodicTypeTMs,therearetwointerruptrequestags,CTMP0F/CTMA0F
andPTMP0F/PTMA0F,andtwoenablebits,CTMP0E/CTMA0EandPTMP0E/PTMA0E.ATM
interruptrequestwilltakeplacewhenanyoftheTMrequestagsareset,asituationwhichoccurs
whenaTMcomparatorPorAmacthsituationhappens.Toallowtheprogramtobranchtoits
respectiveinterruptvectoraddress,theglobalinterruptenablebit,EMI,therespectiveTMinterrupt
enablebitmustrstbeset.Whentheinterruptisenabled,thestackisnotfullandaTMcomparator
matchsituationoccurs,asubroutinecalltotherelevantTMinterruptvectorlocation,willtakeplace.
WhentheTMinterruptisserviced,theTMinterruptrequestagwillbeautomaticallyresetandthe
EMIbitwillbeautomaticallyclearedtodisableotherinterrupts.
EEPROM Interrupt
AnEEPROMInterruptrequestwilltakeplacewhentheEEPROMInterruptrequestag,DEF,isset,
whichoccurswhenanEEPROMWritecycleends.Toallowtheprogramtobranchtoitsrespective
interruptvectoraddress,theglobalinterruptenablebit,EMI,andEEPROMInterruptenablebit,
DEE,mustrstbeset.Whentheinterruptisenabled,thestackisnotfullandanEEPROMWrite
cycleends,asubroutinecalltotherespectiveEEPROMInterruptvector,willtakeplace.Whenthe
EEPROMInterruptisserviced,theDEFagwillbeautomaticallyclearedandtheEMIbitwillbe
automaticallyclearedtodisableotherinterrupts.