Rev. 1.20 82 January 23, 2015 Rev. 1.20 83 January 23, 2015
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
Timer/Counter Mode
Toselectthismode,bitsCT0M1andCT0M0intheCTM0C1registershouldbesetto11
respectively.TheTimer/CounterModeoperatesinanidenticalwaytotheCompareMatchOutput
Modegeneratingthesameinterruptflags.TheexceptionisthatintheTimer/CounterModethe
CTM0outputpinisnotused.ThereforetheabovedescriptionandTimingDiagramsforthe
CompareMatchOutputModecanbeusedtounderstanditsfunction.AstheCTM0outputpinisnot
usedinthismode,thepincanbeusedasanormalI/Opinorotherpin-sharedfunction.
PWM Output Mode
Toselectthismode,bitsCT0M1andCT0M0intheCTM0C1registershouldbesetto10
respectively.ThePWMfunctionwithintheCTM0isusefulforapplicationswhichrequirefunctions
suchasmotorcontrol,heatingcontrol,illuminationcontroletc.Byprovidingasignaloffixed
frequencybutofvaryingdutycycleontheCTM0outputpin,asquarewaveACwaveformcanbe
generatedwithvaryingequivalentDCRMSvalues.
AsboththeperiodanddutycycleofthePWMwaveformcanbecontrolled,thechoiceofgenerated
waveformisextremelyexible.InthePWMmode,theCT0CCLRbithasnoeffectonthePWM
operation.BothoftheCCRA andCCRPregistersareusedtogeneratethePWMwaveform,one
registerisusedtocleartheinternalcounterandthuscontrolthePWMwaveformfrequency,while
theotheroneisusedtocontrolthedutycycle.Whichregisterisusedtocontroleitherfrequency
ordutycycleisdeterminedusingtheCT0DPXbitintheCTM0C1register.ThePWMwaveform
frequencyanddutycyclecanthereforebecontrolledbythevaluesintheCCRAandCCRPregisters.
Aninterruptag,oneforeachoftheCCRAandCCRP,willbegeneratedwhenacomparematch
occursfromeitherComparatorAorComparatorP.TheCT0OCbitIntheCTM0C1registerisused
toselecttherequiredpolarityofthePWMwaveformwhilethetwoCT0IO1andCT0IO0bitsare
usedtoenablethePWMoutputortoforcetheCTM0outputpintoaxedhighorlowlevel.The
CT0POLbitisusedtoreversethepolarityofthePWMoutputwaveform.
CTM, PWM Mode, Edge-aligned Mode, CT0DPX=0
CCRP 001b 010b 011b 100b 101b 110b 111b 000b
Period 128 256 384 512 640 768 896 1024
Duty CCRA
Iff
SYS
=16MHz,CTM0clocksourceisf
SYS
/4,CCRP=100b,CCRA=128,
TheCTM0PWMoutputfrequency=(f
SYS
/4)/512=f
SYS
/2048=7.8125kHz,duty=128/512=25%.
IftheDutyvaluedenedbytheCCRAregisterisequaltoorgreaterthanthePeriodvalue,thenthe
PWMoutputdutyis100%.
CTM, PWM Mode, Edge-aligned Mode, CT0DPX=1
CCRP 001b 010b 011b 100b 101b 110b 111b 000b
Period CCRA
Duty 128 256 384 512 640 768 896 1024
ThePWMoutputperiodisdeterminedbytheCCRAregistervaluetogetherwiththeCTM0clock
whilethePWMdutycycleisdenedbytheCCRPregistervalue.