Rev. 1.20 130 January 23, 2015 Rev. 1.20 131 January 23, 2015
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
Noise Error – NF Flag
Over-samplingisusedfordatarecoverytoidentifyvalidincomingdataandnoise.Ifnoiseis
detectedwithinaframethefollowingwilloccur:
• Thereadonlynoiseag,NF,intheUSRregisterwillbesetontherisingedgeoftheRXIFbit.
• DatawillbetransferredfromtheShiftregistertotheRXRregister.
• Nointerruptwillbegenerated.HoweverthisbitrisesatthesametimeastheRXIFbitwhich
itselfgeneratesaninterrupt.
NotethattheNFagisresetbyaUSRregisterreadoperationfollowedbyanRXRregisterread
operation.
Framing Error – FERR Flag
Thereadonlyframingerrorag,FERR,intheUSRregister,issetifazeroisdetectedinsteadof
stopbits.Iftwostopbitsareselected,onlytherststopbitisdetected,itmustbehigh.Iftherst
stopbitislow,theFERRagwillbeset.TheFERRagisbufferedalongwiththereceiveddata
andisclearedonanyreset.
Parity Error – PERR Flag
Thereadonlyparityerrorag,PERR,intheUSRregister,issetiftheparityofthereceivedwordis
incorrect.Thiserroragisonlyapplicableiftheparityisenabled,PRENbitis"1",andiftheparity
type,oddorevenisselected.ThereadonlyPERRflagisbufferedalongwiththereceiveddata
bytes.Itisclearedonanyreset.ItshouldbenotedthattheFERRandPERRagsarebufferedalong
withthecorrespondingwordandshouldbereadbeforereadingthedataword.
UART Module Interrupt Structure
SeveralindividualUARTconditionscangenerateaUARTinterrupt.Whentheseconditionsexist,
alowpulsewillbegeneratedtogettheattentionofthemicrocontroller.Theseconditionsarea
transmitterdataregisterempty,transmitteridle,receiverdataavailable,receiveroverrun,address
detectandanRXpinwake-up.Whenanyoftheseconditionsarecreated,ifitscorresponding
interruptcontrolisenabledandthestackisnotfull,theprogramwilljumptoitscorresponding
interruptvectorwhereitcanbeservicedbeforereturningtothemainprogram.Fourofthese
conditionshavethecorrespondingUSRregisteragswhichwillgenerateaUARTinterruptifits
associatedinterruptenablecontrolbitintheUCR2registerisset.Thetwotransmitterinterrupt
conditionshavetheirowncorrespondingenablecontrolbits,whilethetworeceiverinterrupt
conditionshaveasharedenablecontrolbit.Theseenablebitscanbeusedtomaskoutindividual
UARTinterruptsources.
Theaddressdetectcondition,whichisalsoaUARTinterruptsource,doesnothaveanassociated
flag,butwillgenerateaUARTinterruptwhenanaddressdetectconditionoccursifitsfunction
isenabledbysettingtheADDENbitintheUCR2register.AnRXpinwake-up,whichisalsoa
UARTinterruptsource,doesnothaveanassociatedag,butwillgenerateaUARTinterruptifthe
microcontrolleriswokenupfromIDLE0orSLEEPmodebyafallingedgeontheRXpin,ifthe
WAKEandRIEbitsintheUCR2registerareset.NotethatintheeventofanRXwake-upinterrupt
occurring,therewillbeacertainperiodofdelay,commonlyknownastheSystemStart-upTime,for
theoscillatortorestartandstabilizebeforethesystemresumesnormaloperation.