Holtek BS82B12A-3 - Page 51

Rev. 1.20 50 January 23, 2015 Rev. 1.20 51 January 23, 2015
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
Control Register
TheSMODregisterisusedtocontroltheinternalclockswithinthedevices.
SMOD Register
Bit 7 6 5 4 3 2 1 0
Name CKS2 CKS1 CKS0 — LTO HTO IDLEN HLCLK
R/W R/W R/W R/W — R R R/W R/W
POR 0 0 0 — 0 0 1 1
Bit7~5 CKS2 ~ CKS0:ThesystemclockselectionwhenHLCLKis"0"
000:f
SUB
(LIRCorLXT)
001:f
SUB
(LIRCorLXT)
010:f
H
/64
011:f
H
/32
100:f
H
/16
101:f
H
/8
110:f
H
/4
111:f
H
/2
Thesethreebitsareusedtoselectwhichclockisusedasthesystemclocksource.In
additiontothesystemclocksource,whichcanbeeithertheLXTorLIRC,adivided
versionofthehighspeedsystemoscillatorcanalsobechosenasthesystemclocksource.
Bit4 Unimplemented,readas"0".
Bit3 LTO:Lowspeedsystemoscillatorreadyag
0:Notready
1:Ready
Thisisthelowspeedsystemoscillatorreadyagwhichindicateswhenthelowspeed
systemoscillatorisstableafterpoweronresetorawake-uphasoccurred.Theag
willbelowwhenintheSLEEPmodebutafterawake-uphasoccurred,theagwill
changetoahighlevelafter1024clockcyclesifLXToscillatorisusedand1~2clock
cyclesiftheLIRCoscillatorisused.
Bit2 HTO:Highspeedsystemoscillatorreadyag
0:Notready
1:Ready
Thisisthehighspeedsystemoscillatorreadyflagwhichindicateswhenthehigh
speedsystemoscillatorisstableafterawake-uphasoccurred.Thisagisclearedto
zerobyhardwarewhenthedeviceispoweredonandthenchangestoahighlevelafter
thehighspeedsystemoscillatorisstable.Thereforethisagwillalwaysbereadas"1"
bytheapplicationprogramafterdevicepower-on.Theagwillbelowwheninthe
SLEEPorIDLE0Modebutafterpoweronresetorawake-uphasoccurred,theag
willchangetoahighlevelafter15~16clockcyclesiftheHIRCoscillatorisused.
Bit1 IDLEN:IDLEModeControl
0:Disable
1:Enable
ThisistheIDLEModeControlbitanddetermineswhathappenswhentheHALT
instructionis executed.Ifthisbitishigh,whenaHALTinstructionisexecutedthe
devicewillentertheIDLEMode.IntheIDLE1ModetheCPUwillstoprunning
butthesystemclockwillcontinueto keeptheperipheralfunctionsoperational,if
FSYSONbitishigh.IfFSYSONbitislow,theCPUandthesystemclockwillallstop
inIDLE0mode.IfthebitislowthedevicewillentertheSLEEPModewhenaHALT
instructionisexecuted.
Bit0 HLCLK:SystemClockSelection
0:f
H
/2~f
H
/64orf
SUB
1:f
H
Thisbitisusedtoselectifthef
H
clockorthef
H
/2~f
H
/64orf
SUB
clockisusedasthe
systemclock.Whenthebitishighthef
H
clockwillbeselectedandiflowthef
H
/2~
f
H
/64orf
SUB
clockwillbeselected.Whensystemclockswitchesfromthef
H
clockto
thef
SUB
clockandthef
H
clockwillbeautomaticallyswitchedofftoconservepower.